ADSP-2184NKCA-320 Analog Devices Inc, ADSP-2184NKCA-320 Datasheet - Page 36

IC DSP 16BIT 80MHZ 144CSPBGA

ADSP-2184NKCA-320

Manufacturer Part Number
ADSP-2184NKCA-320
Description
IC DSP 16BIT 80MHZ 144CSPBGA
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2184NKCA-320

Rohs Status
RoHS non-compliant
Interface
Host Interface, Serial Port
Clock Rate
80MHz
Non-volatile Memory
External
On-chip Ram
20kB
Voltage - I/o
3.30V
Voltage - Core
1.80V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-CSPBGA
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
80MHz
Mips
80
Device Input Clock Speed
80MHz
Ram Size
20KB
Program Memory Size
Not RequiredKB
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89/3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
CSPBGA
Package
144CSP-BGA
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
80 MHz
Device Million Instructions Per Second
80 MIPS
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2184NKCA-320
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADSP-218xN
IDMA Write, Long Write Cycle
Table 23. IDMA Write, Long Write Cycle
1
2
3
4
Parameter
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
Start of Write = IS Low and IWR Low.
If Write Pulse ends before IACK Low, use specifications t
If Write Pulse ends after IACK Low, use specifications t
This is the earliest time for IACK Low from Start of Write. For IDMA Write cycle relationships, please refer to the ADSP-2100 Family User’s Manual.
IKW
IKSU
IKH
IKLW
IKHW
IACK Low Before Start of Write
IAD15–0 Data Setup Before End of Write
IAD15–0 Data Hold After End of Write
Start of Write to IACK Low
Start of Write to IACK High
IAD15–0
IACK
IWR
IS
4
IKSU
1
IDSU
, t
t
IK W
, t
IKH
Figure 34. IDMA Write, Long Write Cycle
IDH
Rev. A | Page 36 of 48 | August 2006
.
.
2, 3, 4
2, 3, 4
t
IKH W
t
IKSU
t
IK LW
DATA
t
IK H
Min
0
0.5t
0
1.5t
CK
CK
+ 5
Max
10
Unit
ns
ns
ns
ns
ns

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