EPF10K30ATI144-3 Altera, EPF10K30ATI144-3 Datasheet - Page 58

• Manufacturer Part Number: EPF10K30ATI144-3
• Description: IC FLEX 10KA FPGA 30K 144-TQFP
• Manufacturer: Altera
• Series: FLEX-10K®r

Specifications of EPF10K30ATI144-3

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 216
• Total Ram Bits: 12288
• Number Of I /o: 102
• Number Of Gates: 69000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 144-TQFP, 144-VQFP
• Family Name: FLEX 10KA
• Number Of Usable Gates: 30000
• Number Of Logic Blocks/elements: 1728
• # Registers: 738
• # I/os (max): 102
• Frequency (max): 125MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 3.3V
• Logic Cells: 1728
• Ram Bits: 12288
• Device System Gates: 69000
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-1265

Figure 26. FLEX 10K Device IOE Timing Model
Figure 27. FLEX 10K Device EAB Timing Model
58
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Output Register
Input Register
Data Feedback
into FastTrack
Interconnect
Output Enable
Clock Enable
Address
Data-In
Clock
Clock
WE
Data-In
Clock
Clear
EAB Data Input
Write Enable
Input Delays
t
t
EAB Clock
t
t
t
EABDATA1
EABDATA2
EABWE1
EABWE2
EABCLK
Delays
Delay
Feedback Delay
Figures 28
Control Delay
Output Data
I/O Element
I/O Register
Input Delay
t
INCOMB
Delay
t
t
t
IOC
IOFD
IOD
Input Register
t
t
t
t
t
t
EABCO
EABBYPASS
EABSU
EABH
EABCH
EABCL
Delays
shows the timing model for bidirectional I/O pin timing.
Input Register Delay
Block Delays
RAM/ROM
I/O Register
t
t
t
t
t
t
t
t
AA
DD
WP
WDSU
WDH
WASU
WAH
WO
t
t
t
t
t
Delays
IOCO
IOCOMB
IOSU
IOH
IOCLR
t
INREG
Output Register
t
t
t
t
t
t
EABCO
EABBYPASS
EABSU
EABH
EABCH
EABCL
Delays
Output
Delays
t
t
t
t
t
t
t
OD1
OD2
OD3
XZ
ZX1
ZX2
ZX3
EAB Output
t
EABOUT
Delay
Altera Corporation
Data-Out