EP2C35F672C6 Altera, EP2C35F672C6 Datasheet - Page 44

• Manufacturer Part Number: EP2C35F672C6
• Description: IC CYCLONE II FPGA 33K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C35F672C6

• Number Of Logic Elements/cells: 33216
• Number Of Labs/clbs: 2076
• Total Ram Bits: 483840
• Number Of I /o: 475
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 33216
• # I/os (max): 475
• Frequency (max): 500MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 33216
• Ram Bits: 483840
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• For Use With: P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N649-1001 - KIT DEV CYCLONE II PCI EXPRESS
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1087; EP2C35F672C6ES

Embedded Multipliers
Figure 2–17. M4K RAM Block LAB Row Interface
Embedded
Multipliers
2–32
Cyclone II Device Handbook, Volume 1
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
C4 Interconnects
f
M4K RAM Block Local
Interconnect Region
16
16
For more information on Cyclone II embedded memory, see the
Cyclone II Memory Blocks chapter in Volume 1 of the Cyclone II Device
Handbook.
Cyclone II devices have embedded multiplier blocks optimized for
multiplier-intensive digital signal processing (DSP) functions, such as
finite impulse response (FIR) filters, fast Fourier transform (FFT)
functions, and discrete cosine transform (DCT) functions. You can use the
embedded multiplier in one of two basic operational modes, depending
on the application needs:
■
■
One 18-bit multiplier
Up to two independent 9-bit multipliers
Byte enable
Clocks
address
LAB Row Clocks
M4K RAM
Block
datain
dataout
Signals
Control
6
16
Direct link
interconnect
to adjacent LAB
Direct link
interconnect
from adjacent LAB
R4 Interconnects
Altera Corporation
February 2007