EP2C50F484C6N Altera, EP2C50F484C6N Datasheet - Page 52

• Manufacturer Part Number: EP2C50F484C6N
• Description: IC CYCLONE II FPGA 50K 484-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C50F484C6N

• Number Of Logic Elements/cells: 50528
• Number Of Labs/clbs: 3158
• Total Ram Bits: 594432
• Number Of I /o: 294
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 50528
• # I/os (max): 294
• Frequency (max): 500MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 50528
• Ram Bits: 594432
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2117

I/O Structure & Features
Figure 2–22. Column I/O Block Connection to the Interconnect
Notes to
(1)
(2)
2–40
Cyclone II Device Handbook, Volume 1
The 28 data and control signals consist of four data out lines, io_dataout[3..0], four output enables,
io_coe[3..0], four input clock enables, io_cce_in[3..0], four output clock enables, io_cce_out[3..0],
four clocks, io_cclk[3..0], four asynchronous clear signals, io_caclr[3..0], and four synchronous clear
signals, io_csclr[3..0].
Each of the four IOEs in the column I/O block can have two io_datain (combinational or registered) inputs.
Local Interconnect
R4 & R24 Interconnects
Figure
from Logic Array (1)
I/O Block
Control Signals
2–22:
28 Data &
LAB Local
Interconnect
LAB
28
C4 & C24 Interconnects
io_datain0[3..0]
io_datain1[3..0] (2)
Column I/O Block
LAB
LAB
Altera Corporation
Column I/O
Block Contains
up to Four IOEs
io_clk[5..0]
February 2007