XC2S50E-6FTG256C Xilinx Inc, XC2S50E-6FTG256C Datasheet - Page 59

IC SPARTAN-IIE FPGA 50K 256FTBGA

XC2S50E-6FTG256C

Manufacturer Part Number

XC2S50E-6FTG256C

Description

IC SPARTAN-IIE FPGA 50K 256FTBGA

Manufacturer

Xilinx Inc

Series

Spartan™-IIEr

Datasheet

1.XC2S50E-6TQG144C.pdf (108 pages)

Specifications of XC2S50E-6FTG256C

Number Of Logic Elements/cells

1728

Number Of Labs/clbs

384

Total Ram Bits

32768

Number Of I /o

182

Number Of Gates

50000

Voltage - Supply

1.71 V ~ 1.89 V

Mounting Type

Surface Mount

Operating Temperature

0°C ~ 85°C

Package / Case

256-LBGA

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

122-1328

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Bonase Electronics (HK) Co., Limited

Part Number:

XC2S50E-6FTG256C

Manufacturer:

ISSI

Quantity:

1 001

Company:

BOSTOCK HK LIMITED

BOSTOCK HK LIMITED

Part Number:

XC2S50E-6FTG256C

Manufacturer:

Xilinx Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

BOSTOCK HK LIMITED

Part Number:

XC2S50E-6FTG256C

Manufacturer:

XILINX

0

Company:

Meier Automation Equipment Co., Limited

Meier Automation Equipment Co., Limited

Part Number:

XC2S50E-6FTG256C

Manufacturer:

XILINX/赛灵思

Quantity:

20 000

Current page: 59 of 108
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TQ144 Pinouts (XC2S50E and XC2S100E)

DS077-4 (2.3) June 18, 2008

Product Specification

I/O (DLL), L17P

I/O

I/O, VREF

Bank 4

I/O, L16N_YY

I/O, L16P_YY

VCCINT

GND

I/O, L15N_YY

I/O, L15P_YY

I/O

I/O, VREF

Bank 4

I/O

I/O, L14N_YY

I/O, L14P_YY

GND

DONE

VCCO

PROGRAM

I/O (INIT),

L13N_YY

I/O (D7),

L13P_YY

I/O

I/O, VREF

Bank 3

I/O

I/O, L12N

I/O (D6), L12P

GND

I/O (D5),

L11N_YY

I/O, L11P_YY

I/O

(Continued)

Function

Pad Name

R

Bank

4

4

4

4

4

4

4

4

4

4

4

4

3

3

3

3

3

3

3

3

3

3

3

-

-

-

-

-

-

P56

P57

P58

P59

P60

P61

P62

P63

P64

P65

P66

P67

P68

P69

P70

P71

P72

P73

P74

P75

P76

P77

P78

P79

P80

P81

P82

P83

P84

Pin

XC2S50E XC2S100E

XC2S50E

Async.

Output

Option

LVDS

All

All

All

All

All

All

All

All

All

All

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

XC2S100E

Option

V

All

All

All

REF

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

www.xilinx.com

TQ144 Pinouts (XC2S50E and XC2S100E)

I/O, VREF

Bank 3, L10N

I/O (D4), L10P

I/O

VCCINT

I/O (TRDY)

VCCO

GND

I/O (IRDY)

I/O

I/O (D3), L9N

I/O, VREF

Bank 2, L9P

I/O

I/O, L8N_YY

I/O (D2),

L8P_YY

GND

I/O (D1), L7N

I/O, L7P

I/O

I/O, VREF

Bank 2

I/O

I/O (DIN, D0),

L6N_YY

I/O (DOUT,

BUSY),

L6P_YY

CCLK

VCCO

TDO

GND

TDI

(Continued)

Function

Pad Name

Spartan-IIE FPGA Family: Pinout Tables

Bank

3

3

3

3

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

-

-

-

-

-

-

-

P100

P101

P102

P103

P104

P105

P106

P107

P108

P109

P110

P111

P85

P86

P87

P88

P89

P90

P91

P92

P93

P94

P95

P96

P97

P98

P99

Pin

XC2S50E

XC2S50E

XC2S50E

XC2S50E

XC2S50E

XC2S50E XC2S100E

Async.

Output

Option

LVDS

All

All

All

All

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

Option

V

All

All

All

REF

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

59

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