EP2SGX60EF1152I4 Altera, EP2SGX60EF1152I4 Datasheet - Page 20

IC STRATIX II GX 60K 1152-FBGA

EP2SGX60EF1152I4

Manufacturer Part Number
EP2SGX60EF1152I4
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX60EF1152I4

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2186

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0
Transceivers
2–12
Stratix II GX Device Handbook, Volume 1
f
Refer to the
volume 2 of the Stratix II GX Handbook.
The output buffer, as shown in
high-speed data serializer and consists of a programmable output driver,
a programmable pre-emphasis circuit, a programmable termination, and
a programmable V
Figure 2–8. Output Buffer
Programmable Output Driver
The programmable output driver can be set to drive out differentially
200 to 1,400 mV. The differential output voltage (V
dynamically, or statically set by using the ALT2GXB megafunction or
through I/O pins.
The output driver may be programmed with four different differential
termination values:
Serializer
100 Ω
120 Ω
150 Ω
External termination
Output Buffer
Stratix II GX Transceiver Architecture Overview
Programmable
Output
Driver
CM
.
Figure
Programmable
Pre-Emphasis
2–8, is directly driven by the
Programmable
OD
Termination
) can be changed
Altera Corporation
chapter in
October 2007
Output
Pins

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