EPF8282ATC100-4N Altera, EPF8282ATC100-4N Datasheet - Page 17

• Manufacturer Part Number: EPF8282ATC100-4N
• Description: IC FLEX 8000A FPGA 2.5K 100-TQFP
• Manufacturer: Altera
• Series: FLEX 8000r

Specifications of EPF8282ATC100-4N

• Number Of Logic Elements/cells: 208
• Number Of Labs/clbs: 26
• Number Of I /o: 78
• Number Of Gates: 2500
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Family Name: FLEX 8000
• Number Of Usable Gates: 2500
• Number Of Logic Blocks/elements: 208
• # Registers: 282
• # I/os (max): 78
• Frequency (max): 125MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 5V
• Logic Cells: 208
• Device System Gates: 2500
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Total Ram Bits: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2255

Altera Corporation
Each LE in an LAB can drive up to two separate column interconnect
channels. Therefore, all 16 available column channels can be driven by the
LAB. The column channels run vertically across the entire device, and
share access to LABs in the same column but in different rows. The
MAX+PLUS II Compiler chooses which LEs must be connected to a
column channel. A row interconnect channel can be fed by the output of
the LE or by two column channels. These three signals feed a multiplexer
that connects to a specific row channel. Each LE is connected to one 3-to-1
multiplexer. In an LAB, the multiplexers provide all 16 column channels
with access to 8 row channels.
Each column of LABs has a dedicated column interconnect that routes
signals out of the LABs into the column. The column interconnect can then
drive I/O pins or feed into the row interconnect to route the signals to
other LABs in the device. A signal from the column interconnect, which
can be either the output of an LE or an input from an I/O pin, must
transfer to the row interconnect before it can enter an LAB.
summarizes the FastTrack Interconnect resources available in each
FLEX 8000 device.
Figure 9
column, and local interconnects, as well as the associated cascade and
carry chains.
EPF8282A
EPF8282AV
EPF8452A
EPF8636A
EPF8820A
EPF81188A
EPF81500A
Table 4. FLEX 8000 FastTrack Interconnect Resources
Device
shows the interconnection of four adjacent LABs, with row,
Rows
2
2
3
4
6
6
FLEX 8000 Programmable Logic Device Family Data Sheet
Channels per Row
168
168
168
168
168
216
Columns
13
21
21
21
21
27
Channels per Column
Table 4
16
16
16
16
16
16
17
3