EPF6024ATC144-3N Altera, EPF6024ATC144-3N Datasheet - Page 34

IC FLEX 6000 FPGA 24K 144-TQFP

EPF6024ATC144-3N

Manufacturer Part Number
EPF6024ATC144-3N
Description
IC FLEX 6000 FPGA 24K 144-TQFP
Manufacturer
Altera
Series
FLEX 6000r
Datasheet

Specifications of EPF6024ATC144-3N

Number Of Logic Elements/cells
1960
Number Of Labs/clbs
196
Number Of I /o
117
Number Of Gates
24000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-TQFP, 144-VQFP
Family Name
FLEX 6000
Number Of Usable Gates
24000
Number Of Logic Blocks/elements
1960
# I/os (max)
117
Frequency (max)
142.86MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
3.3V
Logic Cells
1960
Device System Gates
24000
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Total Ram Bits
-
Lead Free Status / Rohs Status
Compliant

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FLEX 6000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
34
Symbol
V
V
V
V
I
I
I
Symbol
C
C
C
Table 17. FLEX 6000 3.3-V Device DC Operating Conditions
I
OZ
CC0
Table 18. FLEX 6000 3.3-V Device Capacitance
IH
IL
OH
OL
INCLK
IN
OUT
The minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to
5.75 V for input currents less than 100 mA and periods shorter than 20 ns.
Numbers in parentheses are for industrial-temperature-range devices.
Maximum V
Typical values are for T
These values are specified under
The I
The I
as well as output pins.
Capacitance is sample-tested only.
See the
OL
OH
High-level input voltage
Low-level input voltage
3.3-V high-level TTL output
voltage
3.3-V high-level CMOS output
voltage
2.5-V high-level output voltage
3.3-V low-level TTL output
voltage
3.3-V low-level CMOS output
voltage
2.5-V low-level output voltage
Input pin leakage current
Tri-stated I/O pin leakage current V
V
Input capacitance for I/O pin
Input capacitance for dedicated input V
Output capacitance
CC
Operating Requirements for Altera Devices Data
parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
parameter refers to high-level TTL or CMOS output current.
supply current (standby)
CC
Parameter
rise time is 100 ms. V
Parameter
A
= 25° C and V
Table 16 on page
CC
I
I
I
I
I
I
I
I
I
I
V
V
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
I
O
I
must rise monotonically.
CC
= 5.3 V to ground
= ground, no load
= 8 mA DC, V
= 0.1 mA DC, V
= 100 µA DC, V
= 1 mA DC, V
= 2 mA DC, V
= 5.3 V to ground
V
V
= –8 mA DC, V
= –0.1 mA DC, V
= –100 µA DC, V
= –1 mA DC, V
= –2 mA DC, V
IN
IN
OUT
= 3.3 V.
= 0 V, f = 1.0 MHz
= 0 V, f = 1.0 MHz
= 0 V, f = 1.0 MHz
33.
Conditions
Conditions
Note (9)
Sheet.
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
(8)
CCIO
CCIO
(8)
= 3.00 V
= 2.30 V
= 2.30 V
= 3.00 V
= 2.30 V
= 2.30 V
= 3.00 V
= 2.30 V
= 3.00 V
= 2.30 V
Notes
(8)
(8)
(8)
(7)
(7)
(7)
(8)
(8)
(7)
(7)
(5),
V
(6)
CCIO
Min
–0.5
–10
–10
1.7
2.4
2.1
2.0
1.7
Min
– 0.2
Typ
0.5
Altera Corporation
Max
12
Max
5.75
0.45
8
8
0.8
0.2
0.2
0.4
0.7
10
10
5
Unit
Unit
mA
pF
pF
pF
µA
µA
V
V
V
V
V
V
V
V
V
V
V
V

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