EP1SGX40GF1020C7N Altera, EP1SGX40GF1020C7N Datasheet - Page 271

• Manufacturer Part Number: EP1SGX40GF1020C7N
• Description: IC STRATIX GX FPGA 40K 1020-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX40GF1020C7N

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 624
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Software
Device Pin-Outs
Ordering
Information
Figure 7–1. Stratix GX Device Packaging Ordering Information
Altera Corporation
February 2005
10
25
40
F: FineLine BGA
EP1SGX: Stratix GX
C: 4
D: 8
F: 16
G: 20
SGX51007-1.0
Package Type
Device Type
Transceiver
Family Signature
Number of
Channels
EP1SGX
Stratix
software, which provides a comprehensive environment for system-on-a-
programmable-chip (SOPC) design. The Quartus II software includes
hardware description language and schematic design entry, compilation
and logic synthesis, full simulation and advanced timing analysis,
SignalTap
Software Selector Guide for more details on the Quartus II software
features.
The Quartus II software supports the Windows 2000/NT/98, Sun Solaris,
Linux Red Hat v6.2 and HP-UX operating systems. It also supports
seamless integration with industry-leading EDA tools through the
NativeLink
Device pin-outs for Stratix GX devices will be released on the Altera web
site (www.altera.com).
Figure 7–1
40
®
GX devices are supported by the Altera
G
®
describes the ordering codes for Stratix GX devices.
®
logic analysis, and device configuration. See the Design
F
interface.
Number of pins for a particular FineLine BGA package
Pin Count
1020
C
7. Reference & Ordering
7
N
5, 6, or 7, with 5 being the fastest
C: Commercial temperature (t
Indicates specific device options or
shipment method.
ES:
I: Industrial temperature (t
N:
Speed Grade
Optional Suffix
Operating Temperature
Lead free
Engineering sample
®
Quartus
Information
j
= -40˚ C to 100˚ C )
®
j
II design
= 0˚ C to 85˚ C )
7–1