XC4013XL-1PQ208C Xilinx Inc, XC4013XL-1PQ208C Datasheet - Page 12

• Manufacturer Part Number: XC4013XL-1PQ208C
• Description: IC FPGA C-TEMP 3.3V 1SPD 208PQFP
• Manufacturer: Xilinx Inc
• Series: XC4000E/Xr

Specifications of XC4013XL-1PQ208C

• Number Of Logic Elements/cells: 1368
• Number Of Labs/clbs: 576
• Total Ram Bits: 18432
• Number Of I /o: 160
• Number Of Gates: 13000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-BFQFP
• Case: QFP208
• Dc: 01+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

XC4000E and XC4000X Series Field Programmable Gate Arrays
Global Early Clock BUFGEs 3, 4, 7, and 8 Set-up and Hold for IFF and FCL
6-84
Input Setup & Hold Times
No Delay
Global Early Clock and
Global Early Clock and
Partial Delay
Global Early Clock and
Global Early Clock and
Full Delay
Global Early Clock and
* The XC4013XL, XC4036XL, and 4062XL have significantly faster partial and full delay setup times than other devices.
IFF = Input Flip Flop or Latch. FCL = Fast Capture Latch
Notes: Input setup time is measured with the fastest route and the lightest load.
IFF
FCL
IFF
FCL
IFF
Description
Input hold time is measured using the furthest distance and a reference load of one clock pin per IOB as well as driving all
accessible CLB flip-flops. For designs with a smaller number of clock loads, the pad-to-IOB clock pin delay as determined
by the static timing analyzer (TRCE) can be used as a worst-case pin-to-pin no-delay input hold specification.
T
T
T
T
T
PSEN
PFSEN
PSEP
PFSEP
PSED
Symbol
/T
/T
/T
/T
/T
PHEP
PHEN
PHED
PFHEP
PFHEN
Speed Grade
XC4013XL*
XC4036XL*
XC4062XL*
XC4013XL*
XC4036XL*
XC4062XL*
XC4002XL
XC4005XL
XC4010XL
XC4013XL
XC4020XL
XC4028XL
XC4036XL
XC4044XL
XC4052XL
XC4062XL
XC4085XL
XC4002XL
XC4005XL
XC4010XL
XC4020XL
XC4028XL
XC4044XL
XC4052XL
XC4085XL
XC4002XL
XC4005XL
XC4010XL
XC4020XL
XC4028XL
XC4044XL
XC4052XL
XC4085XL
Device
10.3 / 0.0
12.7 / 0.0
13.8 / 0.0
14.5 / 0.0
14.5 / 0.0
10.8 / 0.0
10.3 / 0.0
10.0 / 0.0
12.0 / 0.0
12.6 / 0.0
12.2 / 0.0
13.8 / 0.0
14.1 / 0.0
13.1 / 0.0
17.9 / 0.0
3.0 / 2.0
1.2 / 4.1
1.2 / 4.4
1.2 / 4.7
1.2 / 4.6
1.2 / 5.3
1.2 / 6.7
1.2 / 6.5
1.2 / 6.7
1.2 / 8.4
1.2 / 8.7
7.3 / 1.5
8.4 / 0.0
5.4 / 0.0
9.8 / 0.0
6.4 / 0.8
8.4 / 1.5
5.9 / 0.0
Min
-3
DS005 (v. 1.8 October 18, 1999 - Product Specification
11.0 / 0.0
12.0 / 0.0
12.7 / 0.0
12.7 / 0.0
10.4 / 0.0
11.0 / 0.0
10.6 / 0.0
12.0 / 0.0
12.3 / 0.0
11.4 / 0.0
15.6 / 0.0
2.6 / 1.7
1.1 / 3.6
1.1 / 3.8
1.1 / 4.1
1.1 / 4.0
1.1 / 4.6
1.1 / 5.8
1.1 / 5.7
1.1 / 5.8
1.1 / 7.3
1.1 / 7.5
6.4 / 1.3
7.9 / 0.0
9.0 / 0.0
4.9 / 0.0
9.3 / 0.0
5.9 / 0.8
7.9 / 1.5
5.2 / 0.0
9.4 / 0.0
9.0 / 0.0
8.7 / 0.0
Min
-2
10.4 / 0.0
11.0 / 0.0
11.0 / 0.0
10.5 / 0.0
10.7 / 0.0
13.6 / 0.0
2.3 / 1.5
0.9 / 3.1
0.9 / 3.3
0.9 / 3.6
0.9 / 3.5
0.9 / 4.0
0.9 / 5.1
0.9 / 4.9
0.9 / 5.1
0.9 / 6.3
0.9 / 6.6
5.5 / 1.2
7.4 / 0.0
7.8 / 0.0
4.4 / 0.0
8.8 / 0.0
9.6 / 0.0
5.4 / 0.8
7.4 / 1.5
4.5 / 0.0
8.2 / 0.0
7.8 / 0.0
7.6 / 0.0
9.1 / 0.0
9.5 / 0.0
9.2 / 0.0
9.9 / 0.0
Min
-1
10.2 / 0.0
10.7 / 0.0
10.8 / 0.0
11.8 / 0.0
2.0 / 1.3
0.8 / 2.7
0.8 / 2.9
0.8 / 3.1
0.8 / 3.0
0.8 / 3.5
0.8 / 4.4
0.8 / 4.3
0.8 / 4.4
0.8 / 5.5
0.8 / 5.7
4.8 / 1.0
7.2 / 0.0
7.4 / 0.0
4.3 / 0.0
8.5 / 0.0
9.3 / 0.0
5.0 / 0.8
6.8 / 1.5
3.9 / 0.0
7.1 / 0.0
6.8 / 0.0
6.6 / 0.0
7.9 / 0.0
8.3 / 0.0
8.0 / 0.0
9.1 / 0.0
9.3 / 0.0
8.6 / 0.0
Min
-09
0.5 / 2.7
0.5 / 3.7
0.5 / 4.7
4.0 / 0.0
4.6 / 0.2
6.2 / 0.0
6.0 / 0.0
7.2 / 0.0
7.8 / 0.0
Min
-08
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R