CY7C64613-128NC Cypress Semiconductor Corp, CY7C64613-128NC Datasheet - Page 12

• Manufacturer Part Number: CY7C64613-128NC
• Description: IC MCU USB EZ FX 8K RAM 128BQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX™r

Specifications of CY7C64613-128NC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C646xx
• Ram Size: 8K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 40
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1310

3.2
Document #: 38-08005 Rev. **
128
105
106
107
108
120
121
122
127
128
114
115
116
117
118
65
66
10
11
13
14
15
16
33
41
69
51
1
2
8
9
CY7C646xx Pin Descriptions
80
38
39
42
52
24
25
28
USBD–
USBD+
A10
A11
A12
A13
PSEN#
RESET#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A14
A15
D0
D1
D2
D3
D4
D5
D6
D7
BKPT
EA
Name
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Type
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
Input
Input
(continued)
Default
N/A
N/A
H
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
USB D– Signal. Connect to the USB D– signal through a 24 re-
sistor.
USB D+ Signal. Connect to the USB D+ pin through a 24 resistor.
8051 Address Bus. This bus is driven at all times. When the 8051
is addressing internal RAM it reflects the internal address.
During DMA transfers that use the RD# and WR# strobes, the ad-
dress bus contains the incrementing DMA source or destination
address for data transferred over D[7..0].
8051 Data Bus. This bidirectional bus is high-impedance when in-
active, input for bus reads, and output for bus writes. The data bus
is used for external 8051 program and data memory. The data bus
is also used for DMA transfers that use the RD#/FRD#, WR#,FWR#
pins as strobes. The data bus is active only for external bus access-
es, and is driven LOW in suspend.
Program Store Enable. This active-LOW signal indicates an 8051
code fetch from external memory. It is active for program memory
fetches from 0x1B40-0xFFFF when the EA pin is LOW, or from
0x0000-0xFFFF when the EA pin is HIGH.
Breakpoint. This pin goes active (HIGH) when the 8051 address
bus matches the BPADDRH/L registers and breakpoints are en-
abled in the USBBAV register (BPEN=1). If the BPPULSE bit in the
USBBAV register is HIGH, this signal pulses HIGH for eight 24-/48-
MHz clocks. If the BPPULSE bit is LOW, the signal remains HIGH
until the 8051 clears the BREAK bit (by writing 1 to it) in the USBBAV
register.
Active LOW Reset. Resets the entire chip. This pin is normally tied
to V
Hysteresis input.
External Access. This pin determines where the 8051 fetches code
between addresses 0x0000 and 0x1B3F. If EA=0 the 8051 fetches
this code from its internal RAM. IF EA=1 the 8051 fetches this code
from external memory.
CC
through a 10K resistor, and to GND through a 1- F capacitor.
Description
CY7C64601/603/613
Page 12 of 42