Z85C3008PEG Zilog, Z85C3008PEG Datasheet - Page 2

• Manufacturer Part Number: Z85C3008PEG
• Description: IC 8MHZ Z8500 CMOS SCC 40-DIP
• Manufacturer: Zilog

Specifications of Z85C3008PEG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3929; Z85C3008PEG

Some of the features listed above are available by
default, and some of them (features with "*") are
disabled on default to maintain compatibility with
the existing SCC design, and "program to enable"
through WR7' (write register 7 prime).
GENERAL DESCRIPTION
The Zilog Serial Communications Controller,
Z80C30 SCC, is a pin and software compatible
CMOS member of the SCC family introduced by
Zilog in 1981. It is a dual channel, multi-protocol
data communications peripheral that easily inter-
faces to CPU's with multiplexed address/data
buses. The advanced CMOS process offers lower-
power consumption, higher performance, and
superior noise immunity. The programming flexi-
bility of the internal registers allows the SCC to be
configuredto satisfy a wide variety of serial com-
munications applications. The many on-chip fea-
tures such as baud rate generators, digital phase
locked loops, and crystal oscillators dramatically
reduce the need for external logic. Additional fea-
tures including a 10x19-bit status FIFO and 14-bit
byte counter were added to support high speed
SDLC transfers using DMA controllers.
PB005702-0608
–
RR0, bit D7 and RR10, bit D6 now has
reset default value.
Databus
Control
Interrupt
Control
Bus Interface
CPU & DMA
/INTACK
Figure 1. Z80C30 Functional Block Diagram
/INT
IEO
IEI
Z80C30 CMOS Z-Bus
Interrupt
Internal
Control
Control
Logic
Logic
Channel A
Channel B
Register
Register
The SCC handles asynchronous formats, synchro-
nous byte-oriented protocols such as IBM Bisync,
and synchronous bit-oriented protocols such as
HDLC and IBM SDLC. This versatile device sup-
ports virtually any serial data transfer application
(cassette, diskette, tape drives, etc.)
The device can generate and check CRC codes in
any synchronous mode and can be programmed to
check data integrity in various modes. The SCC
also has facilities for modem controls in both chan-
nels. In applications where these controls are not
needed, the modem controls can be used for gen-
eral-purpose I/O.
The daisy-chain interrupt hierarchy is also sup-
ported as is standard for Zilog peripheral compo-
nents.
Power connections follow conventional descrip-
tions below:
Connection
Power
Ground
®
Note:
SCC Serial Communication Controller
All Signals with a preceding front
slash, "/", are active Low, e.g.: B//W
(WORD is active Low); /B/W (BYTE
is active Low, only).
C hannel A
C hannel B
Circuit
V
GND
CC
Device
V
V
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