MPC852TCVR50A Freescale Semiconductor, MPC852TCVR50A Datasheet - Page 4

• Manufacturer Part Number: MPC852TCVR50A
• Description: IC MPU POWERQUICC 50MHZ 256PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC Ir

Specifications of MPC852TCVR50A

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.9/3.465V
• Operating Supply Voltage (min): 1.7/3.135V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• Core Size: 32 Bit
• Program Memory Size: 8KB
• Cpu Speed: 50MHz
• Embedded Interface Type: SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 256
• Supply Voltage Range: 1.7V To 1.9V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Features
Figure 1
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Two baud rate generators
— Independent (can be connected toany SCC3/4 or SMC1)
— Allows changes during operation
— Autobaud support option
Two SCCs (serial communication controllers)
— Ethernet/IEEE 802.3® standard optional on SCC3 and SCC4, supporting full 10-Mbps
— HDLC/SDLC
— HDLC bus (implements an HDLC-based local area network (LAN))
— Universal asynchronous receiver transmitter (UART)
— Totally transparent (bit streams)
— Totally transparent (frame-based with optional cyclic redundancy check (CRC))
One SMC (serial management channel)
— UART
One SPI (serial peripheral interface)
— Supports master and slave modes
— Supports multimaster operation on the same bus
PCMCIA interface
— Master (socket) interface, release 2.1 compliant
— Supports one independent PCMCIA socket; 8-memory or I/O windows supported
Debug interface
— Eight comparators: four operate on instruction address, two operate on data address, and two
— Supports conditions: = ≠ < >
— Each watchpoint can generate a break point internally
Normal high and normal low power modes to conserve power
1.8 V core and 3.3-V I/O operation with 5-V TTL compatibility. Refer to
the 5-V tolerant pins.
shows the MPC852T block diagram.
operation
operate on data
MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
Table 5
Freescale Semiconductor
for a listing of