MPC862PZQ100B Freescale Semiconductor, MPC862PZQ100B Datasheet - Page 58

• Manufacturer Part Number: MPC862PZQ100B
• Description: IC MPU POWERQUICC 100MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC862PZQ100B

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 100MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 100MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465/3.6V
• Operating Supply Voltage (min): 2/3.135V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

CPM Electrical Characteristics
11.7
Table 20
Table 21
58
1
2
1
2
Num
Num
100
101
102
103
104
105
106
107
108
100
102
103
104
105
106
107
108
The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater than or equal to 2.25/1.
Also applies to CD and CTS hold time when they are used as an external sync signal.
The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 3/1.
Also applies to CD and CTS hold time when they are used as an external sync signals.
provides the NMSI external clock timing.
provides the NMSI internal clock timing.
SCC in NMSI Mode Electrical Specifications
RCLK1 and TCLK1 width high
RCLK1 and TCLK1 width low
RCLK1 and TCLK1 rise/fall time
TXD1 active delay (from TCLK1 falling edge)
RTS1 active/inactive delay (from TCLK1 falling edge)
CTS1 setup time to TCLK1 rising edge
RXD1 setup time to RCLK1 rising edge
RXD1 hold time from RCLK1 rising edge
CD1 setup Time to RCLK1 rising edge
RCLK1 and TCLK1 frequency
RCLK1 and TCLK1 rise/fall time
TXD1 active delay (from TCLK1 falling edge)
RTS1 active/inactive delay (from TCLK1 falling edge)
CTS1 setup time to TCLK1 rising edge
RXD1 setup time to RCLK1 rising edge
RXD1 hold time from RCLK1 rising edge
CD1 setup time to RCLK1 rising edge
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Characteristic
Characteristic
Table 20. NMSI External Clock Timing
Table 21. NMSI Internal Clock Timing
1
1
2
2
1/SYNCCLK +5
1/SYNCCLK
40.00
40.00
40.00
0.00
0.00
5.00
5.00
5.00
5.00
0.00
0.00
0.00
0.00
Min
Min
—
—
All Frequencies
All Frequencies
SYNCCLK/3
15.00
50.00
50.00
30.00
30.00
Freescale Semiconductor
Max
Max
—
—
—
—
—
—
—
—
—
—
—
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns