MC68LC040RC25A Freescale Semiconductor, MC68LC040RC25A Datasheet - Page 72

• Manufacturer Part Number: MC68LC040RC25A
• Description: IC MPU 32BIT 25MHZ 179-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC040RC25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 179-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

3.2.6 Address Translation Protection
The M68040 MMUs provide separate translation tables for supervisor and user address
spaces. The translation tables contain both mapping and protection information. Each
table and page descriptor includes a write-protect (W) bit that can be set to provide write
protection at any level. Page descriptors also contain a supervisor-only (S) bit that can
limit access to programs operating at the supervisor privilege level.
The protection mechanisms can be used individually or in any combination to protect:
3.2.6.1 SUPERVISOR AND USER TRANSLATION TABLES. One way of protecting
supervisor and user address spaces from unauthorized accesses is to use separate
supervisor and user translation tables. Separate trees protect supervisor programs and
data from accesses by user programs and user programs and data from access by
supervisor programs. Access is granted to the supervisor programs that can accesses any
area of memory with MOVES. The translation table pointed to by the SRP is selected for
all other supervisor mode accesses. This translation table can be common to all tasks.
Figure 3-17 illustrates separate translation tables for supervisor accesses and for two user
tasks that share the common supervisor space. Each user task has an translation table
with unique mappings for the logical addresses in its user address space.
3.2.6.2 SUPERVISOR ONLY. A second mechanism protects supervisor programs and
data without requiring segmenting of the logical address space into supervisor and user
address spaces. Page descriptors contain S-bits to protect areas of memory from access
by user programs. When a table search for a user access encounters an S-bit set in a
page descriptor, the table search ends, and an ATC descriptor corresponding to the
logical address is created with the S-bit set. A subsequent retry of the user access results
in an access error exception being taken. The S-bit can be used to protect one or more
pages from user program access. Supervisor and user mode accesses can share
descriptors by using indirect descriptors or by sharing tables. The entire user and
supervisor address spaces can be mapped together by loading the same root pointer
address into both the SRP and URP registers.
MOTOROLA
• Supervisor address space from accesses by user programs.
• User address space from accesses by other user programs.
• Supervisor and user program spaces from write accesses (implicitly supported by
• One or more pages of memory from write accesses.
designating all memory pages used for program storage as write protected).
Freescale Semiconductor, Inc.
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M68040 USER'S MANUAL
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