MC68030FE20C Freescale Semiconductor, MC68030FE20C Datasheet - Page 521
MC68030FE20C
Manufacturer Part Number
MC68030FE20C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030FE20C
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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1
11-58
11.7.1 MMU Effective Address Calculation
The calculate effective address table for MMU instructions lists the number
of clock periods needed for the processor to calculate various effective ad-
dresses. Fetch time is only included for the first level of indirection on memory
indirect addressing modes. The total number of clock cycles is outside the
parentheses. This total includes the number of read, prefetch, and write
cycles, which are shown inside the
FULL FORMAT EXTENSION WORD(S)
(d16,B)
(d32,B)
(An)
(d16,An)
(xxx).W
(xxx).L
(ds,An,Xn)
(d16,An)
(d16,An,Xn)
([d16,An])
([d 16,An],Xn)
((d16,An],d16)
([d 16,An],Xn,d16)
([d16,An],d32)
([d16,An],Xn,d32)
(B)
([B])
([B],I)
([B],d16)
([BJ,l,d16)
([B],d32)
([B],l,d32)
([d16,B])
([d16,B],l)
([d16,B],d16)
([d16,B],l,d16)
([dl 6,B],d32)
Address Mode
MC68030 USER'S M A N U A L
)arentheses as (r/pr/w).
4+op head
8+op head
4+op head
4+op head
4+op head
6+op head
Head
6
6
6
6
6
6
6
6
4
4
4
4
2
4
4
4
6
6
6
6
6
Tail
.0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I-Cache Case No-CacheCase
14(1/0/0)
14(1/0/0)
10(0/0/0)
16(0/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
14(1/0/0)
14(1/0/0)
14(1/0/0)
14(1/0/0)
14(1/0/0)
14(1/0/0)
16(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
12(1/0/0)
8(o/o/o)
4(0/0/0)
4(0/0/0)
4(0/0/0)
6(0/0/0)
4(0/0/0)
8(0/0/0)
8(0/0/0)
MOTOROLA
12(1/1/0)
8(o/1/o)
10(0/2/0)
16(0/2/0)
12(1/1/0)
12(1/2/0)
12(1/2/0)
14(1/2/0)
14(1/2/0)
14(1/2/0)
14(1/2/0)
14(1/2/0)
14(1/2/0)
16(1/3/0)
12(1/2/0)
12(1/2/0)
12(1/2/0)
12(1/2/0)
14(1/3/0)
14(1/3/0)
4(0/1/0)
4(0/1/0)
4(0/1/0)
4(0/1/0)
8(0/2/0)
8(0/2/0)
6(0/2/0)
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