MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 33

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

1-12
#<xxx> or #<data>
IC, DC, IC/DC
{offset:width}
FPm, FPn
MMUSR
B, W, L
SCALE
<fmt>
MSW
LSW
MSB
SIZE
CCR
DFC
FPcr
SFC
+ inf
– inf
LSB
ccc
PC
SR
bd
d n
od
Rc
( )
[ ]
D
P
S
X
k
Positive Infinity
Operand Data Format: Byte (B), Word (W), Long (L), Single (S), Double (D), Extended (X), or
Packed (P).
Specifies a signed integer data type (twos complement) of byte, word, or long word.
Double-precision real data format (64 bits).
A twos complement signed integer (–64 to +17) specifying a number’s format to be stored in
the packed decimal format.
Packed BCD real data format (96 bits, 12 bytes).
Single-precision real data format (32 bits).
Extended-precision real data format (96 bits, 16 bits unused).
Negative Infinity
Immediate data following the instruction word(s).
Identifies an indirect address in a register.
Identifies an indirect address in memory.
Base Displacement
Index into the MC68881/MC68882 Constant ROM
Displacement Value, n Bits Wide (example: d 16 is a 16-bit displacement).
Least Significant Bit
Least Significant Word
Most Significant Bit
Most Significant Word
Outer Displacement
A scale factor (1, 2, 4, or 8, for no-word, word, long-word, or quad-word scaling, respectively).
The index register’s size (W for word, L for long word).
Bit field selection.
Condition Code Register (lower byte of status register)
Destination Function Code Register
Any Floating-Point System Control Register (FPCR, FPSR, or FPIAR)
Any Floating-Point Data Register specified as the source or destination, respectively.
Instruction, Data, or Both Caches
MMU Status Register
Program Counter
Any Non Floating-Point Control Register
Source Function Code Register
Status Register
Table 1-3. Notational Conventions (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
Subfields and Qualifiers
Data Format And Type
Register Names
MOTOROLA