MC68HC000EI12 Freescale Semiconductor, MC68HC000EI12 Datasheet - Page 89

• Manufacturer Part Number: MC68HC000EI12
• Description: IC MPU 16BIT 10MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 16/32Bit
• Frequency (max): 12MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

6.2 EXCEPTION PROCESSING
The processing of an exception occurs in four steps, with variations for different exception
causes:
6.2.1 Exception Vectors
An exception vector is a memory location from which the processor fetches the address of
a routine to handle an exception. Each exception type requires a handler routine and a
unique vector. All exception vectors are two words in length (see Figure 6-1), except for
the reset vector, which is four words long. All exception vectors reside in the supervisor
data space, except for the reset vector, which is in the supervisor program space. A vector
number is an 8-bit number that is multiplied by four to obtain the offset of an exception
vector. Vector numbers are generated internally or externally, depending on the cause of
the exception. For interrupts, during the interrupt acknowledge bus cycle, a peripheral
provides an 8-bit vector number (see Figure 6-2) to the processor on data bus lines D7–
D0.
The processor forms the vector offset by left-shifting the vector number two bit positions
and zero-filling the upper-order bits to obtain a 32-bit long-word vector offset. In the
MC68000, the MC68HC000, MC68HC001, MC68EC000, and the MC68008, this offset is
used as the absolute address to obtain the exception vector itself, which is shown in
Figure 6-3.
6-4
1. Make a temporary copy of the status register and set the status register for
2. Obtain the exception vector.
3. Save the current processor context.
4. Obtain a new context and resume instruction processing.
exception processing.
In the MC68010, the vector offset is added to the 32-bit vector
base register (VBR) to obtain the 32-bit absolute address of
the exception vector (see Figure 6-4). Since the VBR is set to
zero upon reset, the MC68010 functions identically to the
MC68000, MC68HC000, MC68HC001, MC68EC000, and
MC68008 until the VBR is changed via the move control
register MOVEC instruction.
WORD 0
WORD 1
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
Freescale Semiconductor, Inc.
Figure 6-1. Exception Vector Format
EVEN BYTE (A0=0)
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NEW PROGRAM COUNTER (HIGH)
NEW PROGRAM COUNTER (LOW)
NOTE
EVEN BYTE (A0=0)
A1=0
A1=1
MOTOROLA