CS42432-CMZ Cirrus Logic Inc, CS42432-CMZ Datasheet - Page 29

• Manufacturer Part Number: CS42432-CMZ
• Description: IC CODEC 108DB 192KHZ 52-MQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42432-CMZ

• Package / Case: 52-VQFN
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 6
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 108 (Differential), 102 / 105 (Single-Ended)
• Voltage - Supply, Analog: 3.14 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 4
• Number Of Dac Outputs: 6
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 4 ADC/6 DAC
• Thd Plus Noise: - 98 dB ADC / - 98 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1608

DS673F2
No
H/W pins setup to
Hardware Mode
1. VQ = VA/2.
2. Aout bias = VA/2.
3. No audio signal generated.
desired settings.
Valid MCLK
Applied?
No
1. VQ = VA/2.
2. Aout = HI-Z.
3. No audio signal generated.
4. Control Port Registers reset
to default.
Power-Down (Power Applied)
Analog Output Mute
Yes
1. VQ = ?
2. Aout bias = ?
3. No audio signal
generated.
Access Detected?
RST = Low?
Control Port
Control Port
No Power
Accessed
Figure 10. Audio Output Initialization Flow Chart
No
ERROR: MCLK/LRCK ratio change
Registers setup to
desired settings.
Software Mode
Valid MCLK
Yes
Applied?
Yes
ERROR: Power removed
Yes
No
RST = Low
1. VQ = VA/2.
2. Aout bias = VA/2.
3. Audio signal generated per register settings.
No
1. VQ = VA/2.
2. Aout bias = VQ.
1. LRCK valid.
2. SCLK valid.
3. Audio samples
processed.
Sub-Clocks Applied
Normal Operation
2000 LRCK delay
PDN bit = '1'b?
MCLK/LRCK
1. VQ = VA/2.
2. Aout bias = VA/2 + last audio sample.
3. No audio signal generated.
Power-Up
Ratio?
Valid
Yes
No
ERROR: MCLK removed
Analog Output Freeze
Yes
1. VQ = VA/2.
2. Aout bias = Hi-Z.
3. No audio signal generated.
4. Control Port Registers retain
settings.
PDN bit set
to '1'b
Power-Down
CS42432
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