EMC1412-A-ACZL-TR SMSC, EMC1412-A-ACZL-TR Datasheet - Page 15

• Manufacturer Part Number: EMC1412-A-ACZL-TR
• Description: Board Mount Temperature Sensors SMBus Temp Sensor Selectable Address
• Manufacturer: SMSC

Specifications of EMC1412-A-ACZL-TR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Multiple Channel 1°C Temperature Sensor with Beta Compensation
Datasheet
SMSC EMC1412
5.1.6
5.1.7
5.1.8
5.1.9
5.2
SMBus Stop Bit
The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic ‘0’ state to a logic
‘1’ state while the SMBus clock line is in a logic ‘1’ state. When the device detects an SMBus Stop bit
and it has been communicating with the SMBus protocol, it will reset its client interface and prepare
to receive further communications.
SMBus Timeout
The EMC1412 includes an SMBus timeout feature. Following a 30ms period of inactivity on the SMBus
where the SMCLK pin is held low, the device will timeout and reset the SMBus interface.
The timeout function defaults to disabled. It can be enabled by setting the TIMEOUT bit in the
Configuration register (see
SMBus and I
The major difference between SMBus and I
information refer to the SMBus 2.0 specification.
1. Minimum frequency for SMBus communications is 10kHz.
2. The client protocol will reset if the clock is held low longer than 30ms.
3. The client protocol will reset if both the clock and the data line are high for longer than 150us (idle
4. I
5. I
Attempting to communicate with the EMC1412 SMBus interface with an invalid slave address or invalid
protocol will result in no response from the device and will not affect its register contents. Stretching
of the SMCLK signal is supported, provided other devices on the SMBus control the timing.
SMBus Timeout
The EMC1412 supports SMBus Timeout. If the clock line is held low for longer than 30ms, the device
will reset its SMBus protocol. This function can be enabled by setting the TIMEOUT bit in the
Consecutive Alert Register (see
The device supports Send Byte, Read Byte, Write Byte, Receive Byte, and the Alert Response Address
as valid protocols as shown below.
All of the below protocols use the convention in
SMBus Protocols
condition).
bytes to be sent in either direction. The SMBus protocol requires that an additional data byte
indicating number of bytes to read / write is transmitted. The EMC1412 supports I
only.
2
2
C devices do not support the Alert Response Address functionality (which is optional for SMBus).
C devices support block read and write differently. I
2
C Compliance
DATA SENT
TO DEVICE
# of bits sent
Section
Table 5.2 Protocol Format
Section
DATASHEET
7.5).
7.11).
15
2
DATA SENT TO
# of bits sent
C devices is highlighted here. For complete compliance
THE HOST
Table
5.2.
2
C protocol allows for unlimited number of
Revision 1.38 (10-25-10)
2
C formatting