MCP2510-E/SO Microchip Technology, MCP2510-E/SO Datasheet - Page 38

IC CAN CTLR EXTENDED TEMP 18SOIC

MCP2510-E/SO

Manufacturer Part Number
MCP2510-E/SO
Description
IC CAN CTLR EXTENDED TEMP 18SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP2510-E/SO

Controller Type
CAN Interface
Interface
SPI
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
18-SOIC (7.5mm Width)
No. Of Tx Buffers
3
No. Of Rx Buffers
2
No. Of Filters
6
No. Of Masks
2
No. Of Interrupts
1
Supply Voltage Range
3V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
18
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV251001 - KIT DEVELOPMENT CAN MCP2510
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP2510-E/SO
Manufacturer:
MIC
Quantity:
20 000
MCP2510
FIGURE 5-3:
5.8
Some requirements for programming of the time seg-
ments:
• Prop Seg + Phase Seg 1 >= Phase Seg 2
• Prop Seg + Phase Seg 1 >= T
• Phase Seg 2 > Sync Jump Width
For example, assuming that a 125 kHz CAN baud rate
with F
T
500 nsec. To obtain 125 kHz, the bit time must be 16
T
Typically, the sampling of the bit should take place at
about 60-70% of the bit time, depending on the system
parameters. Also, typically, the T
Sync Seg = 1 T
Seg 1 = 7 T
transition. This would leave 6 T
Since Phase Seg 2 is 6, by the rules, SJW could be the
maximum of 4 T
only necessary when the clock generation of the differ-
ent nodes is inaccurate or unstable, such as using
ceramic resonators. So an SJW of 1 is typically
enough.
DS21291F-page 38
OSC
Q
.
T
Input Signal
Q
= 50 nsec, choose BRP<5:0> = 04h, then T
OSC
Programming Time Segments
= 20 MHz is desired:
Q
Sync
would place the sample at 10 T
Q
Q
; Prop Seg = 2 T
. However, normally a large SJW is
Segment
Prop
SHORTENING A BIT PERIOD
Q
DELAY
DELAY
for Phase Seg 2.
Q
; So setting Phase
is 1-2 T
Segment 1
Q
Phase
after the
Q
.
Q
=
Sample
Point
5.9
The bit timing requirements allow ceramic resonators
to be used in applications with transmission rates of up
to 125 kbit/sec, as a rule of thumb. For the full bus
speed range of the CAN protocol, a quartz oscillator is
required. A maximum node-to-node oscillator variation
of 1.7% is allowed.
Oscillator Tolerance
Segment 2
Phase
© 2007 Microchip Technology Inc.
Bit Length
Actual
≤ SJW
Bit Length
Nominal

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