Z8023010VSG Zilog, Z8023010VSG Datasheet - Page 91
![IC 10MHZ Z8000 CMOS ESCC 44-PLCC](/photos/6/57/65795/269-44-plcc_sml.jpg)
Z8023010VSG
Manufacturer Part Number
Z8023010VSG
Description
IC 10MHZ Z8000 CMOS ESCC 44-PLCC
Manufacturer
Zilog
Series
IUSC™r
Datasheet
1.Z8523008PSG.pdf
(117 pages)
Specifications of Z8023010VSG
Controller Type
Serial Communications Controller (SCC)
Interface
Bus
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
4mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 45. Z80230 System Timing Table
Z85230 AC Characteristics
PS005303-0907
No.
1
2
3
4
5
6
7
8
9
10
Notes:
1. Open-drain output, measured with open-drain test load.
2. RxC is RTxC or TRxC, whichever is supplying the receive clock.
3. TxC is TRxC or RTxC, whichever is supplying the transmit clock.
4. Units equal to AS.
5. Units equal to TcPc.
Symbol
TdRXC(REQ)
TdRXC(W)
TdRXC(SY)
TdRXC(INT),
Z80230
TdTXC(REQ)
TdTXC(W)
TdTXC(DRQ)
TdTXC(INT),
Z80230
TdSY(INT)
TdEXT(INT),
Z80230
Table 45
Figure 29
on page 88 illustrates the Z85230 Reset Timing Diagram.
the Z85230 Interrupt Acknowledge Timing Diagram.
Z85230 Cycle Timing Diagram.
Parameter
RxC High to W/REQ Valid
RxC High to Wait Inactive
RxC High to SYNC Valid
RxC High to INT Valid
TxC Low to W/REQ Valid
TxC Low to Wait Inactive
TxC Low to DTR/REQ Valid
TxC Low to INT Valid
SYNC to INT Valid
DCD or CTS to INT Valid
describes the Z80230 system timing parameter details.
on page 87 illustrates the Z85230 Read and Write Timing Diagram.
Min.
13
13
9
13
2
11
8
7
2
2
+2
2
10 MHz
Max.
17
19
12
17
3
14
14
9
3
6
+3
3
Figure 32
Figure 31
Min.
13
13
9
13
2
11
8
7
2
2
+2
3
on page 88 illustrates the
Product Specification
16 MHz
Electrical Characteristics
on page 88 illustrates
Max.
17
19
12
17
3
14
14
9
3
6
+3
8
Z85230/Z80230
Figure 30
Notes
2, 5
1, 2, 5
2, 5
1, 2, 4
3, 5
1, 3, 5
3, 5
1, 3, 4
1, 5
1, 4
86
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