UPD720102GC-YEB-A Renesas Electronics America, UPD720102GC-YEB-A Datasheet - Page 23

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UPD720102GC-YEB-A

Manufacturer Part Number
UPD720102GC-YEB-A
Description
IC HOST CTLR USB2.0 3-PORTS QFP
Manufacturer
Renesas Electronics America

Specifications of UPD720102GC-YEB-A

Controller Type
USB 2.0 Controller
Interface
PCI
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-20°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
120-TQFP
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

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Power consumption
Pin capacitance
Input capacitance
Output capacitance
I/O capacitance
PCI input pin capacitance
PCI clock input pin capacitance
PCI IDSEL input pin capacitance
Notes 1. When any device is not connected to all the ports of HC, the power consumption for HC does not depend
Power
Consumption
Remark These are estimated value on Windows™ XP environment.
Parameter
2. The number of active ports is set by the value of Port No Field in PCI configuration space EXT register.
3. This is the case when PCI bus state is B0.
4. This is the case when PCI bus state is B3.
on the number of active ports.
Parameter
Symbol
P
P
P
P
P
P
P
P
P
WD0-0
WD0-1
WD0-2
WD0-3
WD0_C
WD1
WD2
WD3H
WD3C
Device state = D0, All the ports does not connect to any
function, and each OHCI controller is under USB suspend
and EHCI controller is stopped.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 1.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 2.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 3.
The power consumption under suspend state during PCI
clock is stopped by CRUN0. Device state = D0.
Device state = D1, Analog PLL output is stopped.
Device state = D2, Analog PLL output is stopped.
Device state = D3
output is stopped.
Device state = D3
Full- or low-speed device is on the port.
High-speed device is on the port.
Full- or low-speed devices are on the port.
High-speed devices are on the port.
Full- or low-speed devices are on the port.
High-speed devices are on the port.
Symbol
C
C
C
C
C
IDSEL
C
hot
cold
clk
IO
Note 3
O
in
I
Data Sheet S17998EJ4V0DS
, VCCRST0 = High, Analog PLL
, VCCRST0 = Low.
Condition
V
f
Unmeasured pins returned to 0 V
C
DD
= 1 MHz
= 0 V, T
Note 1
A
Condition
Note 4
= 25°C
Note 3
Note 3
Note 2
Note 2
Note 2
130.7
With 30 MHz
Typ.
11.0
15.6
60.3
17.4
96.1
18.8
11.0
0.03
2.1
2.1
2.1
Crystal
Min.
111.8
151.8
Max.
16.0
22.6
70.8
31.6
40.0
16.0
5.9
5.9
5.9
3.0
μ
131.2
With 48 MHz
Typ.
60.7
96.6
10.8
1.38
3.0
7.7
9.5
3.0
3.0
3.0
3.0
Max.
Oscillator
PD720102
8
8
8
8
8
8
112.4
152.2
Max.
13.5
71.3
22.4
31.5
7.0
7.0
7.0
7.0
7.0
5.2
Unit
pF
pF
pF
pF
pF
pF
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21

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