PIC18F4620-I/P Microchip Technology Inc., PIC18F4620-I/P Datasheet - Page 386

• Manufacturer Part Number: PIC18F4620-I/P
• Description: 40 Pin, 64 KB Flash, 3968 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4620-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 36
• Interface: SPI/I2C/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 64K Bytes
• Ram Size: 4K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2525/2620/4525/4620
Timing Diagrams and Specifications ................................ 343
DS39626B-page 384
A/D Conversion Requirements ................................ 360
Capture/Compare/PWM (CCP) Requirements ........ 348
CLKO and I/O Requirements ................................... 345
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
External Clock Requirements .................................. 343
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock ................................................................. 344
Reset, Watchdog Timer,
Timer0 and Timer1 External
USART Synchronous Receive
USART Synchronous Transmission
2
C Bus Data Requirements (Slave Mode) .............. 355
(Master Mode, CKE = 0) .................................. 350
(Master Mode, CKE = 1) .................................. 351
(Slave Mode, CKE = 0) .................................... 352
(Slave Mode, CKE = 1) .................................... 353
Requirements ................................................... 356
(PIC18F4410/4510/4515/4610) ....................... 349
Oscillator Start-up Timer,
Power-up Timer and
Brown-out Reset Requirements ....................... 346
Clock Requirements ......................................... 347
Requirements ................................................... 358
Requirements ................................................... 358
2
2
C Bus Data Requirements ................ 357
C Bus Start/Stop Bits
Preliminary
Top-of-Stack Access .......................................................... 54
TRISE Register
TSTFSZ ........................................................................... 307
Two-Speed Start-up ................................................. 249, 260
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 339
W
Watchdog Timer (WDT) ........................................... 249, 258
WCOL ...................................................... 189, 190, 191, 194
WCOL Status Flag ................................... 189, 190, 191, 194
WWW, On-Line Support ...................................................... 5
X
XORLW ............................................................................ 307
XORWF ........................................................................... 308
PSPMODE Bit .......................................................... 114
Example Cases .......................................................... 58
BRGH Bit ................................................................. 205
Associated Registers ............................................... 259
Control Register ....................................................... 258
During Oscillator Failure .......................................... 261
Programming Considerations .................................. 258
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