PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 25

• Manufacturer Part Number: PIC16C71-04/P
• Description: 18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C71-04/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 36 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit
• Voltage, Range: 3-6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

5.0
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
5.1
PORTA is a 5-bit latch.
The RA4/T0CKI pin is a Schmitt Trigger input and an
open drain output. All other RA port pins have TTL
input levels and full CMOS output drivers. All pins have
data direction bits (TRIS registers) which can configure
these pins as output or input.
Setting a TRISA register bit puts the corresponding out-
put driver in a hi-impedance mode. Clearing a bit in the
TRISA register puts the contents of the output latch on
the selected pin(s).
Reading the PORTA register reads the status of the
pins whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore a write to a port implies that the port pins are
read, this value is modified, and then written to the port
data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin.
Other PORTA pins are multiplexed with analog inputs
and analog V
selected by clearing/setting the control bits in the
ADCON1 register (A/D Control Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 5-1:
BCF
CLRF
BSF
MOVLW
MOVWF
Applicable Devices
1997 Microchip Technology Inc.
Note:
STATUS, RP0
PORTA
STATUS, RP0
0xCF
TRISA
I/O PORTS
PORTA and TRISA Registers
On a Power-on Reset, these pins are con-
figured as analog inputs and read as '0'.
REF
input. The operation of each pin is
INITIALIZING PORTA
;
; Initialize PORTA by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<4> as outputs
; TRISA<7:5> are always
; read as '0'.
710 71 711 715
FIGURE 5-1:
FIGURE 5-2:
Data
bus
WR
Port
WR
TRIS
RD PORT
To A/D Converter
Note 1: I/O pins have protection diodes to V
Data
bus
WR
TRIS
WR
PORT
RD PORT
Note 1: I/O pin has protection diodes to V
TMR0 clock input
V
D
D
Data Latch
TRIS Latch
SS
CK
CK
TRIS Latch
.
Data Latch
D
D
CK
CK
RD TRIS
BLOCK DIAGRAM OF
RA3:RA0 PINS
BLOCK DIAGRAM OF RA4/
T0CKI PIN
Q
Q
Q
Q
RD TRIS
Q
Q
Q
Q
PIC16C71X
Q
Q
EN
Schmitt
Trigger
input
buffer
Analog
input
mode
EN
D
EN
D
DS30272A-page 25
V
N
SS
V
V
P
N
SS
DD
SS
DD
I/O pin
only.
and
TTL
input
buffer
I/O pin
(1)
(1)