ICS1893BF IDT, Integrated Device Technology Inc, ICS1893BF Datasheet - Page 97

• Manufacturer Part Number: ICS1893BF
• Description: PHYCEIVER LOW PWR 3.3V 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893BF

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 1893BF

8.2.4 MAC Interface Pins
8.2.4.1 MAC Interface Pins for Media Independent Interface
ICS1893BF, Rev. F, 5/13/10
This section lists pin descriptions for each of the following interfaces
•
Table 8-7
Table 8-7. MAC Interface Pins: Media Independent Interface (MII)
COL
CRS
MDC
Name
Section 8.2.4.1, “MAC Interface Pins for Media Independent Interface”
Pin
ICS1893BF Data Sheet Rev. F - Release
lists the MAC Interface pin descriptions for the MII.
Number
Pin
43
44
27
Output
Output
Type
Input
Pin
Collision (Detect).
The ICS1893BF asserts a signal on the COL pin when the ICS1893BF
detects receive activity while transmitting (that is, while the TXEN signal is
asserted by the MAC, that is, when transmitting). When the mode is:
Carrier Sense.
When the ICS1893BF mode is:
Management Data Clock.
The ICS1893BF uses the signal on the MDC pin to synchronize the
transfer of management information between the ICS1893BF and the
Station Management Entity (STA), using the serial MDIO data line. The
MDC signal is sourced by the STA.
Note:
1. The signal on the COL pin is not synchronous to either RXCLK or
2. In full-duplex mode, the COL signal is disabled and always remains
3. The COL signal is asserted as part of the signal quality error (SQE)
•
•
•
•
Note: The signal on the CRS pin is not synchronous to the signal on
un-squelched MDI receive signal.
two non-contiguous zeros in any 10-bit symbol derived from the MDI
receive data stream.
detects either receive or transmit activity.
on its CRS pin only in response to receive activity.
10Base-T, the ICS1893BF detects receive activity by monitoring the
100Base-TX, the ICS1893BF detects receive activity when there are
TXCLK.
low.
test. This assertion can be suppressed with the SQE Test Inhibit bit (bit
18.2).
Half-duplex, the ICS1893BF asserts a signal on its CRS pin when it
Either full-duplex or Repeater mode, the ICS1893BF asserts a signal
Copyright © 2009, IDT, Inc.
either the RXCLK or TXCLK pin.
All rights reserved.
97
Chapter 8 Pin Diagram, Listings, and Descriptions
Pin Description
May, 2010