KSZ8721BL Micrel Inc, KSZ8721BL Datasheet - Page 14

• Manufacturer Part Number: KSZ8721BL
• Description: IC TXRX PHY 10/100 3.3V 48-LQFP
• Manufacturer: Micrel Inc
• Type: Transceiverr

Specifications of KSZ8721BL

• Number Of Drivers/receivers: 1/1
• Protocol: MII, RMII
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Data Rate: 100Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 151mA
• Supply Voltage Range: 3.3V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 48
• Interface Type: MII, RMII
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1627 - BOARD EVALUATION FOR KSZ8721BMC576-1626 - BOARD EVALUATION FOR KSZ8721BL
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1028-5; 576-1511-5; 576-1511-5; KSZ8721BL

KS8721BL/SL
to the RMII. TX_EN is negated prior to the first REF_CLK following the final di-bit of a frame. TX_EN transitions synchronously
with respect to REF_CLK.
Transmit Data [1:0] (TXD[1:0])
Transmit Data TXD[1:0] transitions synchronously with respect to REF_CLK. When TX_EN is asserted, TXD[1:0] are accepted
for transmission by the PHY. TXD[1:0] remains as “00” to indicate idle when TX_EN is de-asserted. Values of TXD[1:0] other
than “00” when TX_EN is de-asserted are reserved for out-of-band signalling (to be defined). Values other than “00” on
TXD[1:0] while TX_EN is de-asserted are ignored by the PHY.
Collision Detection
Since the definition of CRS_DV and TX_EN both contain an accurate indication of the start of frame, the MAC reliably
regenerates the COL signal of the MII by ANDing TX_EN and CRS_DV.
During the IPG time following the successful transmission of a frame, the COL signal is asserted by some transceivers as a
self-test. The Signal Quality Error (SQE) function is not supported by the reduced MII due to the lack of the COL signal.
Historically, SQE was present to indicate that a transceiver located physically remote from the MAC was functioning. Since
the reduced MII only supports chip-to-chip connections on a PCB, SQE functionality is not required.
RX_ER
The PHY provides RX_ER as an output according to the rules specified in IEEE 802.3u [2] (see Clause 24, Figure 24-11–
Receive State Diagram). RX_ER is asserted for one or more REF_CLK periods to indicate that an error (e.g., a coding error
or any error that a PHY is capable of detecting, and that may otherwise be undetectable by the MAC sublayer) is detected
somewhere in the frame presently being transferred from the PHY. RX_ER transitions synchronously with respect to
REF_CLK. While CRS_DV is de-asserted, RX_ER has no effect on the MAC.
RMII AC Characteristics
Unused RMII Pins
Input Pins
Output Pins
M9999-051704
Symbol
t
t
SU
H
Parameter
REF_CLK Frequency
REF_CLK Duty Cycle
TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RXER
TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RXER
Data Hold from REF_CLK
Rising Edge
TXD[2:3] and TXER are pull-down to GND.
RXD[2:3] and RXC are no connect.
Note that the RMII pin needs to be pulled up to enable RMII mode.
14
Min
35
4
2
Typ
50
Max
65
May 2004
MHz
Unit
Micrel
ns
ns
%