PEB24901HV12 Lantiq, PEB24901HV12 Datasheet - Page 13

• Manufacturer Part Number: PEB24901HV12
• Manufacturer: Lantiq

Specifications of PEB24901HV12

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
Table 1
Pin Definitions and Functions (cont’d)
Pin No. Symbol
Interface to Analog Front End
21
19
18
63
62
49
56
11
4
ST21
ST30
ST31
TP1
TP2
TP3
TSP
CL15
PDM0
Input (I)
Output (O)
I
I
I
I
I
I
I
I
I
Description
Status pin 1 of line port 2, status is
passed to IOM-2 via Monitor message.
Connect to either VDD or GND, if not
used.
Status pin 0 of line port 3, status is
passed to IOM-2 via Monitor
message. Connect to either VDD or
GND, if not used.
Status pin 1 of line port 3, status is
passed to IOM-2 via Monitor message.
Connect to either VDD or GND, if not
used.
Test pin 1. Not available to user.
Connect to GND.
Test pin 2. Not available to user.
Connect to GND.
Test pin 3. Not available to user.
Connect to GND.
Single pulse test mode. For activation
refer to table "T.B.D". When active,
"+1" pulses are issued in 1 ms intervals.
Connect to GND when not used.
Master Clock 15.36 MHz. All operations
and the data exchange on the digital
interface are based on this clock.
Input of second-order sigma-delta ADC
pulse density modulated bit stream
from the PEB 24902 Quad AFE, line
port 0
12
PEB 24901
Reference
3.2.1.2.4
3.2.1.2.4
3.2.1.2.4
3.2.1.2.4
3.2.2
3.2.2
02.95