MCIMX536AVV8C Freescale Semiconductor, MCIMX536AVV8C Datasheet - Page 102

• Manufacturer Part Number: MCIMX536AVV8C
• Description: IC, 32-BIT MPU, 800 MHz, 529-BGA
• Manufacturer: Freescale Semiconductor
• Series: ARM Cortex-A8r

Specifications of MCIMX536AVV8C

• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 800MHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 0.8V To 1.15V
• Lead Free Status / Rohs Status: Supplier Unconfirmed

1
Electrical Characteristics
102
IP34
IP35
IP36
IP37
IP38
IP47
This parameter is a requirement to the display connected to the IPU.
IP27 Read system cycle time
IP28 Write system cycle time
IP29 RS start
IP30 CS start
IP31 CS hold
IP32 RS hold
IP33 Controls setup time for
IP34 Controls hold time for
IP35 Controls setup time for
IP36 Controls hold time for
IP37 Slave device data
IP38 Slave device data hold
ID
ID
read
read
write
write
delay
time
Read hold
Write start
Controls hold time for write
Slave device data delay
Slave device data hold time
Read time point
8
Table 60. Asynchronous Display Interface Timing Parameters (Pixel Level) (continued)
12
Parameter
Table 61. Asynchronous Parallel Interface Timing Parameters (Access Level)
Parameter
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
1
Symbol
Tcycr
Tcycw
Tdcsrr
Tdcsc
Tdchc
Tdchrr
Tdcsr
Tdchr
Tdcsw
Tdchw
Tracc
Troh
Tdchr
Tdcsw
Tdchw
Tracc
Troh
Tdrp
Symbol
Tdicpw – 1.24
Tdicurs – 1.24
Tdicucs – 1.24
Tdicdcs – Tdicucs – 1.2
4
Tdicdrs – Tdicurs – 1.24 Tdicdrs
Tdicur – 1.24
Tdicdw – Tdicuw – 1.24 Tdicpw
Tdrp – Tlbd – Tdicdr+1.
24
Tdicpr – 1.24
Tdicdr – Tdicur – 1.24
Tdicuw – 1.24
Hold time of data on the buss Time that display read data is valid
Min
0
Delay of incoming data
Data sampling point
DOWN#
DOWN#
Value
UP#
Tdicpr
Tdicpw
Tdicurs
Tdicur
Tdicdcs
Tdicur
Tdicdr
Tdicuw
2
8
3
10
Typ
6
–Tdicur
4
–Tdicurs
—
—
–Tdicucs
–Tdicuw
1
read strobe release signal,
write strobe switch, predefined
predefined value in DI REGISTER
value in DI REGISTER
write strobe release, predefined
value in DI REGISTER
Physical delay of display’s data,
defined from Read access local
start point
in input bus
Point of input data sampling by DI,
predefined in DC Microcode
9
7
11
5
Tdicpr+1.24
Tdicpw+1.24
Tdicurs+1.24
Tdicucs+1.24
Tdicdcs – Tdicucs+1.24
Tdicdrs – Tdicurs+1.24
Tdicur+1.24
Tdicdr – Tdicur+1.24
Tdicuw+1.24
Tdicdw–Tdicuw+1.24
Tdrp
24
Tdicpr – Tdicdr – 1.24
Description
13
– Tlbd
Freescale Semiconductor
Max
14
–Tdicur–1.
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—