LTC1065CSW#PBF Linear Technology, LTC1065CSW#PBF Datasheet - Page 8

• Manufacturer Part Number: LTC1065CSW#PBF
• Description: IC FILTR 5TH ORDR LOWPASS 16SOIC
• Manufacturer: Linear Technology

Specifications of LTC1065CSW#PBF

• Filter Type: Bessel, Lowpass Switched Capacitor
• Frequency - Cutoff Or Center: 50kHz
• Number Of Filters: 1
• Max-order: 5th
• Voltage - Supply: ±2.375 V ~ 8 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A
Self-Clocking Operation
The LTC1065 features an internal oscillator which can be
tuned via an external RC. The LTC1065’s internal oscillator
is primarily intended for generation of clock frequencies
below 500kHz. The first curve of the Typical Performance
Characteristics section shows how to quickly choose the
value of the RC for a given frequency. More precisely, the
frequency of the internal oscillator is equal to:
For clock frequencies (f
Figure 4b shows the variation of the parameter K versus
clock frequency and power supply. First choose the de-
sired clock frequency (f
4b pick the right value of K, set C = 200pF and solve for R.
Example 1: f
then,
LTC1065
8
TEST CIRCUIT
PPLICATI
f
CLK
= K/RC
T
R = (1.0)/(200kHz × 204pF) = 24.5k.
CUTOFF
A
= 25°C, K = 1.0, C = 200pF
O
V
V
IN
–
U
= 2kHz, f
1
2
3
4
S
CLK
CLK
Figure 4a.
LTC1065
I FOR ATIO
) below 100kHz, K equals 1.07.
< 500kHz), then through Figure
U
R
CLK
V
V
IN
= 200kHz, V
–
8
7
6
5
W
V
V
OUT
+
C
1065 F04a
0.1µF
1
2
3
4
LTC1065
S
Figure 3. Test Circuit for THD
= ±5V,
U
CLOCK IN
8
7
6
5
50k
Note a 4pF parasitic capacitance is assumed in parallel
with the external 200pF timing capacitor. Figure 5 shows
the clock frequency variation from – 40°C to 85°C. The
200kHz clock of Example 1 will change by –1.75% at 85°C.
For a limited temperature range, the internal oscillator of
the LTC1065 can be used to generate clock frequencies
above 500kHz (Figures 6 and 7). The data of Figure 6 is
derived from several devices. For a given external (RC)
value, the observed device-to-device clock frequency varia-
tion was ±1% (V
Example 2:
from Figure 6, K = 0.575,
and,
0.1µF
V
+
–
+
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
LT1022
20pF
50k
f
T
R = (0.575)/(2MHz × 14pF) = 20.5k.
CUTOFF
f
C = 200pF
T
100
A
CLK
A
S
INTERNAL CLOCK FREQUENCY (kHz)
= 25°C
= 25°C, C = 10pF
= ±5V), and ±1.25% for V
= K/RC
Figure 4b. f
1065 F03
200
= 20kHz, f
V
V
V
S
S
OUT
= ±7.5V
= ±2.5V
300
CLK
CLK
vs K
400
V
S
= ±5V
= 2MHz, V
500
1065 F04b
S
= ±2.5V.
S
= ±7.5V,
1065fb