LTC1569CS8-7#PBF Linear Technology, LTC1569CS8-7#PBF Datasheet - Page 9

IC FILTER 10TH ORDR LOWPASS8SOIC

LTC1569CS8-7#PBF

Manufacturer Part Number
LTC1569CS8-7#PBF
Description
IC FILTER 10TH ORDR LOWPASS8SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1569CS8-7#PBF

Filter Type
Linear Phase, Lowpass Switched Capacitor
Frequency - Cutoff Or Center
300kHz
Number Of Filters
1
Max-order
10th
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-

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APPLICATIONS
Table 2. Wideband Noise vs Supply Voltage, Single 3V Supply
Bandwidth
DC to f
DC to 2 • f
DC to f
Table 3. Wideband Noise vs Supply Voltage, f
Power Supply
3V
5V
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the clock
frequency and its harmonics that are present at the filter’s
OUT pin (Pin 8). The clock feedthrough is measured with
IN
PC board layout and the power supply decoupling. Table 4
shows the clock feedthrough (the RMS sum of the first 11
harmonics) when the LTC1569-7 is self-clocked with
R
clock feedthrough can be reduced with a simple RC post
filter.
Table 4. Clock Feedthrough
Power Supply
3V
5V
DC Accuracy
DC accuracy is defined as the error in the output voltage
after DC offset and DC gain errors are removed. This is
similar to the definition of the integral nonlinearity in A/D
converters. For example, after measuring values of V
vs V
shows that V
straight line that best fits the data. The DC accuracy
describes how much the actual data deviates from this
straight line (i.e., DCERROR = V
+ 0.00134V). In a 12-bit system with a full-scale value of
2V, the LSB is 488 V. Therefore, if the DCERROR of the
filter is less than 488 V over a 2V range, the filter has
5V
5V
EXT
+
and IN
IN(DC)
= 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The
CUTOFF
CLK
CUTOFF
for a typical LTC1569-7, a linear regression
(Pins 1 and 2) grounded and depends on the
OUT(DC)
U
= V
IN(DC)
INFORMATION
U
• 0.99854 + 0.00134V is the
OUT(DC)
Total Integrated Noise
Total Integrated Noise
W
DC to 2 • f
– (V
Feedthrough
105 V
125 V
155 V
125 V
135 V
145 V
0.4mV
0.6mV
0.9mV
CUTOFF
IN(DC)
RMS
RMS
RMS
RMS
RMS
RMS
RMS
RMS
RMS
CUTOFF
= 128kHz
U
• 0.99854
OUT(DC)
DC Offset
The output DC offset of the LTC1569-7 is trimmed to less
than 5mV. The trimming is performed with V
–1.1V with the filter cutoff frequency set to 8kHz (R
10k, DIV/CLK shorted to V
performance, appropriate PC layout techniques should be
used. The filter IC should be soldered to the PC board. The
power supplies should be well decoupled including a 1 F
ceramic capacitor from V
plane should be used. Noisy signals should be isolated
from the filter input pins.
When the power supply is 3V, the output DC offset
typically change less than 2mV when the clock frequency
varies from 64kHz to 8192kHz. When the clock frequency
is fixed, the output DC offset will typically change by 4mV
( 13mV) when the power supply varies from 3V to 5V
( 5V) in the divide-by-1 mode. In the divide-by-4 or
divide-by-16 modes, the output DC offset will typically
change – 9mV (– 27mV) when the power supply varies
from 3V to 5V ( 5V). The offset is measured with respect
to GND (Pin 3).
Aliasing
Aliasing is an inherent phenomenon of sampled data
filters. In lowpass filters significant aliasing only occurs
when the frequency of the input signal approaches the
sampling frequency or multiples of the sampling fre-
quency. The LTC1569-7 samples the input signal twice
12-bit DC accuracy. Figure 9 illustrates the typical DC
accuracy of the LTC1569-7 on a single 5V supply.
–244
–488
488
244
000
–1.5
V
R
T
A
S
EXT
–1.0
= 25 C
= 5V
= 10k
–0.5
Figure 9
+
+
V
). To obtain optimum DC offset
(Pin 7) to V
IN
DC (V)
0
0.5
LTC1569-7
1.0
(Pin 4). A ground
1569-7 F09
1.5
S
= 1.9V,
EXT
9
=

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