MCP23S08-E/SO Microchip Technology, MCP23S08-E/SO Datasheet - Page 16

IC I/O EXPANDER SPI 8B 18SOIC

MCP23S08-E/SO

Manufacturer Part Number
MCP23S08-E/SO
Description
IC I/O EXPANDER SPI 8B 18SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP23S08-E/SO

Package / Case
18-SOIC (7.5mm Width)
Interface
SPI
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
10MHz
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
MCP23S08
Propagation Delay Time
50 ns
Operating Supply Voltage
1.8 V to 5.5 V
Power Dissipation
700 mW
Operating Temperature Range
- 40 C to + 125 C
Input Voltage
1.8 V to 5.5 V
Logic Type
I/O Expander
Maximum Clock Frequency
10 MHz
Maximum Operating Frequency
1.7 MHz
Mounting Style
SMD/SMT
Output Current
25 mA
Output Voltage
1.8 V to 4.5 V
Chip Configuration
8 Bit
Bus Frequency
10MHz
Ic Interface Type
Serial, SPI
No. Of I/o's
8
Supply Voltage Range
1.8V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
18
Filter Terminals
SMD
Rohs Compliant
Yes
Delay Time
50ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPAD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP23S08-E/SO
Manufacturer:
HIMAX
Quantity:
1 450
Part Number:
MCP23S08-E/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP23008/MCP23S08
1.6.7
The GPPU register controls the pull-up resistors for the
port pins. If a bit is set and the corresponding pin is
configured as an input, the corresponding port pin is
internally pulled up with a 100 kΩ resistor.
REGISTER 1-7:
DS21919E-page 16
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-0
PU7
PULL-UP RESISTOR
CONFIGURATION (GPPU)
REGISTER
PU7:PU0: These bits control the weak pull-up resistors on each pin (when configured as an input)
<7:0>.
1 = Pull-up enabled.
0 = Pull-up disabled.
R/W-0
PU6
GPPU – GPIO PULL-UP RESISTOR REGISTER (ADDR 0x06)
W = Writable bit
‘1’ = Bit is set
R/W-0
PU5
R/W-0
PU4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PU3
R/W-0
PU2
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-0
PU1
R/W-0
PU0
bit 0

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