MAX9236EUM+D Maxim Integrated Products, MAX9236EUM+D Datasheet - Page 9

IC LVDS DESERIAL 21BIT 48-TSSOP

MAX9236EUM+D

Manufacturer Part Number
MAX9236EUM+D
Description
IC LVDS DESERIAL 21BIT 48-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX9236EUM+D

Function
Deserializer
Data Rate
1.386Gbps
Input Type
LVDS
Output Type
LVTTL, LVCMOS
Number Of Inputs
3
Number Of Outputs
21
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 8. Power-Down Delay
The MAX9234/MAX9236/MAX9238 operate in DC-bal-
ance mode only. Pinouts are the same as the
MAX9210/MAX9220/MAX9222 except that pin 6 on the
MAX9234/MAX9236/MAX9238 is no connect (N.C.). DC
balance allows AC-coupling with series capacitors. The
MAX9234/MAX9236/MAX9238 are hot-swappable and
the input frequency can be changed on the fly, but oth-
erwise the specifications and functionality are the same
as the MAX9210/MAX9220/MAX9222 operating in DC-
balance mode. See Table 1.
Figure 9. Deserializer Serial Input
RxCLK OUT
PWRDWN
TxIN_, DCA_, AND DCB_ ARE DATA FROM THE SERIALIZER.
RxCLK IN
RxOUT_
CYCLE N - 1
+
-
RxCLK IN
RxIN2
RxIN1
RxIN0
DCA2
DCA1
DCA0
DCB2
DCB1
DCB0
MAX9234/MAX9236/MAX9238 vs.
Hot-Swappable, 21-Bit, DC-Balanced LVDS
MAX9210/MAX9220/MAX9222
TxIN20
TxIN13
TxIN6
_______________________________________________________________________________________
TxIN19
TxIN12
TxIN5
TxIN18
TxIN11
TxIN4
0.8V
RPDD
TxIN17
TxIN10
TxIN3
CYCLE N
TxIN16
TxIN9
TxIN2
TxIN15
TxIN8
TxIN1
HIGH-Z
TxIN14
TxIN7
TxIN0
DCA2
DCA1
DCA0
Voltage droop and the DSV of transmitted symbols
cause signal transitions to start from different voltage
levels. Because the transition time is finite, starting the
signal transition from different voltage levels causes
timing jitter. The time constant for an AC-coupled link
needs to be chosen to reduce droop and jitter to an
acceptable level.
The RC network for an AC-coupled link consists of the
LVDS receiver termination resistor (R
output resistor (R
itors (C). The RC time constant for two equal-value
series capacitors is (C x (R
RC time constant for four equal-value series capacitors
is (C x (R
R
ance (usually 100Ω) and R
driver design (the minimum differential output resis-
tance of 78Ω for the MAX9209/MAX9211/MAX9213/
MAX9215 serializers is used in the following example).
This leaves the capacitor selection to change the sys-
tem time constant.
T
is required to match the transmission line imped-
DCB2
DCB1
DCB0
Selection of AC-Coupling Capacitors
T
TxIN20
TxIN13
TxIN6
+ R
O
Applications Information
)) / 4 (Figure 11).
TxIN19
TxIN12
TxIN5
O
), and the series AC-coupling capac-
TxIN18
TxIN11
TxIN4
Deserializers
O
CYCLE N + 1
T
TxIN17
TxIN10
TxIN3
is determined by the LVDS
+ R
O
TxIN16
)) / 2 (Figure 10). The
TxIN9
TxIN2
T
), the LVDS driver
TxIN15
TxIN8
TxIN1
TxIN14
TxIN7
TxIN0
9

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