DS90UR124QVSX/NOPB National Semiconductor, DS90UR124QVSX/NOPB Datasheet - Page 5

• Manufacturer Part Number: DS90UR124QVSX/NOPB
• Description: IC SER/DESER 5-43MHZ 24B 64-TQFP
• Manufacturer: National Semiconductor

Specifications of DS90UR124QVSX/NOPB

• Function: Serializer/Deserializer
• Data Rate: 1.03Gbps
• Input Type: LVCMOS
• Output Type: LVDS
• Number Of Inputs: 24
• Number Of Outputs: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Number Of Elements: 1
• Number Of Receivers: 1
• Number Of Drivers: 24
• Operating Supply Voltage (typ): 3.3V
• Differential Input High Threshold Voltage: 50mV
• Diff. Input Low Threshold Volt: -50mV
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• For Use With: SERDESUR-43USB - BOARD EVAL DS90UR124,DS90UR241
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS90UR124QVSX

t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
TxOUT_E_O TxOUT_Eye_Opening.
t
t
t
t
t
t
TCP
TCIH
TCIL
CLKT
JIT
LLHT
LHLT
DIS
DIH
HZD
LZD
ZHD
ZLD
PLD
SD
RCP
RDC
CLH
CHL
CLH
CHL
Symbol
Serializer Input Timing Requirements for TCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Serializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Deserializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Symbol
Transmit Clock Period
Transmit Clock High Time
Transmit Clock Low Time
TCLK Input Transition Time
TCLK Input Jitter
LVDS Low-to-High Transition Time R
LVDS High-to-Low Transition Time
D
D
D
D
D
D
Serializer PLL Lock Time
Serializer Delay
TxOUT_E_O centered on (tBIT/)2
Receiver out Clock Period
RCLK Duty Cycle
LVCMOS Low-to-High
Transition Time
LVCMOS High-to-Low
Transition Time
LVCMOS Low-to-High
Transition Time
LVCMOS High-to-Low
Transition Time
IN
IN
OUT
OUT
OUT
OUT
(0:23) Setup to TCLK
(0:23) Hold from TCLK
± HIGH to TRI-STATE Delay
± LOW to TRI-STATE Delay
± TRI-STATE to HIGH Delay
± TRI-STATE to LOW Delay
Parameter
Parameter
Parameter
t
PTOSEL = H
PTOSEL = H,
SLEW = L
C
(lumped load),
SLEW = H
(Note
C
(lumped load),
SLEW = L
(Note
RCP
L
L
Conditions
= 4 pF
= 4 pF
= t
C
R
(Note
R
C
(Note
R
R
RAOFF = L, TRFB = H,
(Figure
R
RAOFF = L, TRFB = L,
(Figure
5 MHz–43 MHz,
R
RANDOM pattern
(Note
(Figure
9)
9)
TCP
L
L
L
L
L
L
L
L
L
= 100Ω, VODSEL = L,
= 10 pF to GND,
= 100Ω, C
= 100Ω,
= 10 pF to GND,
= 100Ω
= 100Ω, PRE = OFF,
= 100Ω, PRE = OFF,
= 100Ω, C
,
9),
6),
10,
(Figure
Figure
(Note
8)
8)
9)
(Figure
(Figure
Note
Conditions
RCLK
(Figure
R
RCLK, LOCK
R
RCLK, LOCK
Conditions
10)
5
L
L
4,
OUT
OUT
5)
= 10 pF to GND,
= 10 pF to GND,
11),
((Note
Pin/Freq.
5)
6)
[0:23],
[0:23],
(Note
(Figure
15)
9))
14)
3)
23.25
Min
45
23.25
0.3T
0.3T
Min
3.5T+2
3.5T+2
0.76
Min
4
4
0.5T
0.5T
Typ
Typ
2.5
1.5
1.5
2.0
2.0
50
T
0.84
T
Typ
245
264
10
10
75
75
±100
Max
0.7T
0.7T
3.5T+10
3.5T+10
200
Max
550
550
150
150
15
15
10
Max
200
2.5
2.5
3.5
3.5
55
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Units
Units
ns
ns
ns
ns
ps
ms
Units
ps
ps
ns
ns
ns
ns
ns
ns
ns
ns
UI
ns
ns
ns
ns
ns
%