TJA1081TS,112 NXP Semiconductors, TJA1081TS,112 Datasheet - Page 17

• Manufacturer Part Number: TJA1081TS,112
• Description: IC TXRX FLEXRAY 16SSOP
• Manufacturer: NXP Semiconductors

Specifications of TJA1081TS,112

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 16-SSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935287496112

NXP Semiconductors
Table 9.
TJA1081
Product data sheet
Bit number Status bit
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
Status bits
LOCAL WAKEUP
REMOTE WAKEUP
-
PWON
BUS ERROR
TEMP HIGH
TEMP MEDIUM
TXEN_BGE CLAMPED
UVVBAT
UVVCC
6.5.10 UV
6.5.12 Error flag
6.5.11 UV
6.5.9 UV
6.6 Status register
The error flag is reset if the data on the bus lines (pins BP and BM) are the same as on pin
TXD or if the transmitter is disabled. No action will be taken if the bus error flag is set.
The UV
is reset if the voltage is higher than V
Section
The UV
t
than t
The UV
t
flag is set; see
The error flag is set if one of the status bits S4 to S10 is set. The error flag is reset if none
of the S4 to S10 status bits are set; see
The status register can be read out on pin ERRN by using pin EN as clock; the status bits
are given in
The status register is accessible if:
After reading the status register, if no edge is detected on pin EN for longer than t
the status bits (S4 to S12) will be cleared if the corresponding flag has been reset. Pin
ERRN is LOW if the corresponding status bit is set.
det(uv)(VCC)
det(uv)(VIO)
•
•
VBAT
VCC
VIO
UV
UV
rec(uv)(VCC)
VIO
VCC
flag
VBAT
VCC
VIO
6.4.1.
flag
flag
. The flag is reset if the voltage on pin V
. The flag is reset if the voltage on pin V
flag is not set and the voltage on pin V
flag is set if the voltage on pin V
flag is not set and the voltage on pin V
flag is set if the voltage on pin V
Table
flag is set if the voltage on pin V
Section
All information provided in this document is subject to legal disclaimers.
or the wake flag is set; see
Description
local wake-up source flag is redirected to this bit
remote wake-up source flag is redirected to this bit
not used; always set
status bit set means PWON flag has been set previously
status bit set means bus error flag has been set previously
status bit set means temperature high flag has been set previously
status bit set means temperature medium flag has been set previously
status bit set means TXEN_BGE clamped flag has been set previously
status bit set means UV
status bit set means UV
9. The timing diagram is shown in
Rev. 4 — 24 February 2011
6.4.3.
uvd(VBAT)
VBAT
VCC
Table
flag has been set previously
IO
flag has been set previously
Section
CC
BAT
is lower than V
or by setting the wake flag; see
9.
is lower than V
is lower than V
IO
IO
IO
CC
is between 4.75 V and 5.25 V
6.4.2.
is higher than V
is between 2.2 V and 4.75 V
Figure
is higher than V
9.
uvd(VIO)
uvd(VCC)
FlexRay node transceiver
uvd(VBAT)
for longer than
uvd(VIO)
uvd(VCC)
for longer than
TJA1081
© NXP B.V. 2011. All rights reserved.
. The UV
or the wake
for longer
VBAT
det(EN)
17 of 37
flag
,