SI2457-D-FS Silicon Laboratories Inc, SI2457-D-FS Datasheet - Page 58

• Manufacturer Part Number: SI2457-D-FS
• Description: IC ISOMODEM SYSTEM-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2457-D-FS

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si2457/34/15/04
15. 16-Pin SOIC Land Pattern
Figure 24 illustrates the recommended land pattern for the Si2457/34/15/04 16-Pin SOIC. Table 18 lists the values
for the dimensions shown in the illustration.
58
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ASME Y14.5M-1994.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material
5. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
6. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should
7. The stencil thickness should be 0.125 mm (5 mils).
8. The ratio of stencil aperture to land pad size should be 1:1.
9. A No-Clean, Type-3 solder paste is recommended.
10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
be used to assure good solder paste release.
specification for Small Body Components.
C1
X1
Y1
E
Table 18. 16-Pin SOIC Land Pattern Dimensions
Figure 24. 16-Pin SOIC Land Pattern Diagram
Pad Column Spacing
Pad Row Pitch
Rev. 1.3
Pad Length
Pad Width
Feature
(mm)
5.40
1.27
0.60
1.55