AD8429ARZ Analog Devices Inc, AD8429ARZ Datasheet - Page 15

• Manufacturer Part Number: AD8429ARZ
• Description: 58T4524
• Manufacturer: Analog Devices Inc

Specifications of AD8429ARZ

• Rohs Compliant: YES
• Lead Free Status / Rohs Status: Compliant

THEORY OF OPERATION
ARCHITECTURE
The AD8429 is based on the classic 3-op-amp topology. This
topology has two stages: a preamplifier to provide differential
amplification followed by a difference amplifier that removes
the common-mode voltage and provides additional amplifica-
tion. Figure 46 shows a simplified schematic of the AD8429.
The first stage works as follows. To keep its two inputs matched,
Amplifier A1 must keep the collector of Q1 at a constant voltage.
It does this by forcing RG− to be a precise diode drop from –IN.
Similarly, A2 forces RG+ to be a constant diode drop from +IN.
Therefore, a replica of the differential input voltage is placed
across the gain setting resistor, R
this resistance must also flow through the R1 and R2 resistors,
creating a gained differential signal between the A2 and A1
outputs.
The second stage is a G = 1 difference amplifier, composed of
Amplifier A3 and the R3 through R6 resistors. This stage removes
the common-mode signal from the amplified differential signal.
The transfer function of the AD8429 is
where:
GAIN SELECTION
Placing a resistor across the R
AD8429, which can be calculated by referring to Table 5 or by
using the following gain equation:
V
G
R
OUT
G
=
=
1+
= G × (V
6
G
6
kΩ
−
R
kΩ
1
G
COMPENSATION
IN+
–IN
− V
IN−
+V
–V
) + V
S
S
G
I
B
G
terminals sets the gain of the
. The current that flows through
REF
Q1
I
RG–
C1
3kΩ
R1
A1
NODE 1
+V
–V
S
S
R
Figure 46. Simplified Schematic
G
V
B
Rev. 0 | Page 15 of 20
+V
–V
S
S
A2
NODE 2
R2
3kΩ
C2
RG+
Q2
Table 5. Gains Achieved Using 1% Resistors
1% Standard Table Value of R
6.04 kΩ
1.5 kΩ
665 Ω
316 Ω
121 Ω
60.4 Ω
30.1 Ω
12.1 Ω
6.04 Ω
3.01 Ω
The AD8429 defaults to G = 1 when no gain resistor is used.
Add the tolerance and gain drift of the R
specifications of the AD8429 to determine the total gain accu-
racy of the system. When the gain resistor is not used, gain
error and gain drift are minimal.
R
The AD8429 duplicates the differential voltage across its inputs
onto the R
handle the expected power dissipation.
REFERENCE TERMINAL
The output voltage of the AD8429 is developed with respect to
the potential on the reference terminal. This is useful when the
output signal must be offset to a precise midsupply level. For
example, a voltage source can be tied to the REF pin to level
shift the output, allowing the AD8429 to drive a single-supply
ADC. The REF pin is protected with ESD diodes and should
not exceed either +V
G
Power Dissipation
I
I
COMPENSATION
B
+V
–V
S
S
G
resistor. Choose an R
+IN
5kΩ
5kΩ
R4
R5
S
or −V
5kΩ
R6
5kΩ
A3
R3
+V
–V
S
S
S
by more than 0.3 V.
G
+V
–V
G
S
S
resistor size sufficient to
V
REF
OUT
G
resistor to the
Calculated Gain
1.993
5.000
10.02
19.99
50.59
100.3
200.3
496.9
994.4
1994
AD8429