IDT74LVC16543APA IDT, Integrated Device Technology Inc, IDT74LVC16543APA Datasheet

IDT74LVC16543APA

Manufacturer Part Number

IDT74LVC16543APA

Description

Manufacturer

IDT, Integrated Device Technology Inc

Datasheet

1.IDT74LVC16543APA.pdf (6 pages)

Specifications of IDT74LVC16543APA

Logic Family

LVC

Operating Supply Voltage (typ)

3.3V

Propagation Delay Time

7.9ns

Number Of Elements

Number Of Channels

Input Logic Level

LVTTL

Output Logic Level

LVTTL

Output Type

3-State

Package Type

TSSOP

Polarity

Non-Inverting

Logical Function

Latched Transceiver

Operating Supply Voltage (min)

2.7V

Operating Supply Voltage (max)

3.6V

Technology

CMOS

Operating Temp Range

-40C to 85C

Operating Temperature Classification

Industrial

Mounting

Surface Mount

Pin Count

Lead Free Status / Rohs Status

Not Compliant

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FEATURES:

• Typical t

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

• V

• CMOS power levels (0.4µ µ µ µ µ W typ. static)

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

• Available in SSOP, TSSOP, and TVSOP packages

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

FUNCTIONAL BLOCK DIAGRAM

IDT74LVC16543A

3.3V CMOS 16-BIT REGISTERED TRANSCEIVER

machine model (C = 200pF, R = 0)

OEBA

OEAB

CEBA

CEAB

LEBA

LEAB

= 3.3V ± 0.3V, Normal Range

= 2.7V to 3.6V, Extended Range

SK(o)

(Output Skew) < 250ps

TO SEVEN OTHER CHANNELS

3.3V CMOS 16-BIT

REGISTERED TRANSCEIVER

WITH 3-STATE OUTPUTS,

5 VOLT TOLERANT I/O

OEBA

OEAB

CEBA

CEAB

DESCRIPTION:

dual metal CMOS technology. This high-speed, low-power device can be

used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-

enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are

provided for each register to permit independent control in either direction

of data flow. For example, the A-to-B enable (CEAB) must be low to enter

data from the A port or to output data from the B port. LEAB controls the

latch function. When LEAB is low, the latches are transparent. A subse-

quent low-to-high transition of LEAB signal puts the A latches in the storage

mode. OEAB performs the output enable function on the B port. Data flow

from the B port to the A port is similar but requires using CEBA, LEBA, and

OEBA inputs. Flow-through organization of signal pins simplifies layout. All

inputs are designed with hysteresis for improved noise margin.

or 5V devices. This feature allows the use of this device as a translator in

a mixed 3.3V/5V supply system.

driver is capable of driving a moderate to heavy load while maintaining

speed performance.

LEBA

LEAB

The LVC16543A 16-bit registered transceiver is built using advanced

All pins of this 16-bit latched transceiver can be driven from either 3.3V

The LVC16543A has been designed with a

TO SEVEN OTHER CHANNELS

INDUSTRIAL TEMPERATURE RANGE

IDT74LVC16543A

24mA output driver. This

JULY 1999

DSC-4730/2

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IDT74LVC16543APA Summary of contents

Page 1

IDT74LVC16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER FEATURES: • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF • 3.3V ± 0.3V, ...

Page 2

IDT74LVC16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER PIN CONFIGURATION 1 OEAB 1 2 LEAB 1 CEAB 3 1 GND ...

Page 3

IDT74LVC16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input LOW Voltage Level IL ...

Page 4

IDT74LVC16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER OPERATING CHARACTERISTICS, V Symbol Parameter C Power Dissipation Capacitance per Transceiver Outputs enabled PD C Power Dissipation Capacitance per Transceiver Outputs disabled PD SWITCHING CHARACTERISTICS Symbol Parameter t Propagation Delay PLH t xAx to ...

Page 5

IDT74LVC16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 300 300 LZ V ...

Page 6

IDT74LVC16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER ORDERING INFORMATION X XX IDT XX LVC Temp. Range Bus-Hold Family CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 XX XXXX Device Type Package 543A 16 Blank 74 for SALES: ...

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