NE567N NXP Semiconductors, NE567N Datasheet - Page 9

• Manufacturer Part Number: NE567N
• Manufacturer: NXP Semiconductors

Specifications of NE567N

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Package Type: PDIP
• Pin Count: 8
• Mounting: Through Hole
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
AVAILABLE OUTPUTS
The primary output is the uncommitted output transistor collector,
Pin 8. When an in-band input signal is present, this transistor
saturates; its collector voltage being less than 1.0 volt (typically
0.6V) at full output current (100mA). The voltage at Pin 2 is the
phase detector output which is a linear function of frequency over
the range of 0.95 to 1.05 f
of frequency deviation. The average voltage at Pin 1 is, during lock,
a function of the in-band input amplitude in accordance with the
transfer characteristic given. Pin 5 is the controlled oscillator square
wave output of magnitude (+V –2V
average of +V/2. A 1k load may be driven from pin 5. Pin 6 is an
exponential triangle of 1V
high impedance loads may be connected to pin 6 without affecting
the CCO duty cycle or temperature stability.
2002 Sep 25
Tone decoder/phase-locked loop
OUTPUT
(PIN 8)
LOW PASS
FILTER
(PIN 2)
PIN 1
VOLTAGE
(AVG)
Figure 18. Available outputs
4.0
3.5
3.0
2.5
0.9f
P-P
O
IN-BAND
INPUT
VOLTAGE
0
O
with a slope of about 20mV per percent
f
with an average DC level of +V/2. Only
1
= f
(Figure 18)
THRESHOLD VOLTAGE
O
100
BE
f
O
) (+V–1.4V) having a DC
V
CE
7%
200mVrms
(SAT) < 1.0V
14%
1.1f
O
V
BW
REF
SL00555
V+
0
3.9V
3.8V
3.7V
9
OPERATING PRECAUTIONS
A brief review of the following precautions will help the user achieve
the high level of performance of which the 567 is capable.
1. Operation in the high input level mode (above 200 mV) will free
2. The 567 will lock onto signals near (2n+1) f
3. Maximum immunity from noise and out-band signals is afforded
4. Due to the high switching speeds (20 ns) associated with 567
the user from bandwidth variations due to changes in the in-band
in the low input level (below 200 mV
signal amplitude. The input stage is now limiting, however, so
that out-band signals or high noise levels can cause an apparent
bandwidth reduction as the inband signal is suppressed. Also,
the limiting action will create in-band components from
sub-harmonic signals, so the 567 becomes sensitive to signals
at f
output for signals near (4n+1) f
signals at 5f
signals are anticipated, they should be attenuated before
reaching the 567 input.
operating mode. However, decreased loop damping causes the
worst-case lock-up time to increase, as shown by the Greatest
Number of Cycles Before Output vs Bandwidth graph.
operation, care should be taken in lead routing. Lead lengths
should be kept to a minimum. The power supply should be
adequately bypassed close to the 567 with a 0.01 F or greater
capacitor; grounding paths should be carefully chosen to avoid
ground loops and unwanted voltage variations. Another factor
which must be considered is the effect of load energization on
the power supply. For example, an incandescent lamp typically
draws 10 times rated current at turn-on. This can cause supply
voltage fluctuations which could, for example, shift the detection
band of narrow-band systems sufficiently to cause momentary
loss of lock. The result is a low-frequency oscillation into and out
of lock. Such effects can be prevented by supplying heavy load
currents from a separate supply or increasing the supply filter
capacitor.
O
/3, f
O
/5, etc.
O
and 9f
O
can cause an unwanted output. If such
O
where n = 0, 1, 2, etc. Thus,
RMS
NE567/SE567
) and reduced bandwidth
O
, and will give an
Product data