AM29DL800BB-70WBI Spansion Inc., AM29DL800BB-70WBI Datasheet - Page 3

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AM29DL800BB-70WBI

Manufacturer Part Number
AM29DL800BB-70WBI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29DL800BB-70WBI

Cell Type
NOR
Density
8Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
20/19Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
FBGA
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Supply Current
12mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Am29DL800B
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
This product has been retired and is not recommended for designs. For new and current designs please contact your Spansion representative
for alternates. Availability of this document is retained for reference and historical purposes only.
DISTINCTIVE CHARACTERISTICS
■ Simultaneous Read/Write operations
■ Single power supply operation
■ Manufactured on 0.35 µm process technology
■ High performance
■ Low current consumption (typical values
■ Flexible sector architecture
■ Unlock Bypass Program Command
— Host system can program or erase in one bank,
— Zero latency between read and write operations
— Read-while-erase
— Read-while-program
— Full voltage range: 2.7 to 3.6 volt read and write
— Compatible with 0.5 µm Am29DL800 device
— Access times as fast as 70 ns
at 5 MHz)
— 7 mA active read current
— 21 mA active read-while-program or read-while-
— 17 mA active program-while-erase-suspended
— 200 nA in standby mode
— 200 nA in automatic sleep mode
— Standard t
— Two 16 Kword, two 8 Kword, four 4 Kword, and
— Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and
— Any combination of sectors can be erased
— Supports full chip erase
— Reduces overall programming time when
then immediately and simultaneously read from
the other bank
operations for battery-powered applications
erase current
current
transition from automatic sleep mode to active mode
fourteen 32 Kword sectors in word mode
fourteen 64 Kbyte sectors in byte mode
issuing multiple program command sequences
DATA SHEET
CE
chip enable access time applies to
■ Sector protection
■ Top or bottom boot block configurations
■ Embedded Algorithms
■ Minimum 1,000,000 program/erase cycles
■ Package options
■ Compatible with JEDEC standards
■ Data# Polling and Toggle Bits
■ Ready/Busy# output (RY/BY#)
■ Erase Suspend/Erase Resume
■ Hardware reset pin (RESET#)
— Hardware method of locking a sector to prevent
— Sectors can be locked in-system or via
— Temporary Sector Unprotect feature allows code
available
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
guaranteed per sector
— 44-pin SO
— 48-pin TSOP
— 48-ball FBGA
— Pinout and software compatible with
— Superior inadvertent write protection
— Provides a software method of detecting
— Hardware method for detecting program or
— Suspends or resumes erasing sectors to allow
— No need to suspend if sector is in the other bank
— Hardware method of resetting the device to
any program or erase operation within that sector
programming equipment
changes in previously locked sectors
pre-programs and erases sectors or entire chip
programs and verifies data at specified address
single-power-supply flash standard
program or erase cycle completion
erase cycle completion
reading and programming in other sectors
reading array data
Publication# 21519
Issue Date: March 17, 2009
Rev: C Amendment: 5

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