AT49LV8192AT-90TC Atmel, AT49LV8192AT-90TC Datasheet - Page 8

• Manufacturer Part Number: AT49LV8192AT-90TC
• Manufacturer: Atmel

Specifications of AT49LV8192AT-90TC

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 20/19Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Program/erase Volt (typ): 3 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 1M/512K
• Supply Current: 25mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

Command Definition (in Hex) for Alternate Pin Definition of AT49BV/LV008A(T)
Notes:
Absolute Maximum Ratings*
8
Command
Sequence
Read
Chip Erase
Sector Erase
Byte/Word Program
Boot Block Lockout
Product ID Entry
Product ID Exit
Product ID Exit
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to V
Voltage on RESET
with Respect to Ground ...................................-0.6V to +13.5V
1. The DATA FORMAT in each bus cycle is as follows: I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex)
2. The boot sector has the address range
3. Either one of the Product ID Exit commands can be used.
4. SA = sector addresses: (A0 - A18)
AT49BV/LV008A(T)/8192A(T)
The ADDRESS FORMAT in each bus cycle is as follows: A15 - A0 (Hex), A-1, and A15 - A18 (Don’t Care)
AT49BV/LV008AT
For the AT49BV/LV008A
SA = 02XXX for BOOT BLOCK
SA = 04XXX for PARAMETER BLOCK 1
SA = 06XXX for PARAMETER BLOCK 2
SA = FEXXX for MAIN MEMORY ARRAY
For the AT49BV/LV008AT
SA = FEXXX for BOOT BLOCK
SA = FAXXX for PARAMETER BLOCK 1
SA = F8XXX for PARAMETER BLOCK 2
SA = F6XXX for MAIN MEMORY ARRAY
(3)
(3)
(2)
Cycles
Bus
1
6
6
4
6
3
3
1
.
Addr
A555
A555
A555
A555
A555
A555
Addr
xxxx
1st Bus
Cycle
Data
D
AA
AA
AA
AA
AA
AA
F0
OUT
00000H to 03FFFH for the AT49BV/LV008A; FC000H to FFFFFH for the
5AAA
5AAA
5AAA
5AAA
5AAA
5AAA
Addr
CC
2nd Bus
+ 0.6V
Cycle
Data
55
55
55
55
55
55
Addr
A555
A555
A555
A555
A555
A555
*NOTICE:
3rd Bus
Cycle
Data
A0
F0
80
80
80
90
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Addr
A555
A555
A555
Addr
4th Bus
Cycle
Data
AA
AA
D
AA
IN
5AAA
5AAA
5AAA
Addr
5th Bus
Cycle
Data
55
55
55
1049K–FLASH–11/02
Addr
A555
A555
SA
6th Bus
(4)
Cycle
Data
(1)
10
30
40