LH28F800SGE-L10 Sharp Electronics, LH28F800SGE-L10 Datasheet - Page 5

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LH28F800SGE-L10

Manufacturer Part Number
LH28F800SGE-L10
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F800SGE-L10

Cell Type
NOR
Density
8Mb
Access Time (max)
100ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
19b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Program/erase Volt (typ)
2.7/3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
16b
Number Of Words
512K
Supply Current
65mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
1 INTRODUCTION
This datasheet contains LH28F800SG-L/SGH-L
specifications. Section 1 provides a flash memory
overview. Sections 2, 3, 4, and 5 describe the
memory organization and functionality. Section 6
covers electrical specifications. LH28F800SG-L/
SGH-L flash memories documentation also includes
ordering information which is referenced in
Section 7.
1.1 New Features
Key enhancements of LH28F800SG-L/SGH-L
SmartVoltage flash memories are :
Note following important differences :
1.2 Product Overview
The LH28F800SG-L/SGH-L are high-performance
8 M-bit SmartVoltage flash memories organized as
512 k-word of 16 bits. The 512 k-word of data is
arranged in sixteen 32 k-word blocks which are
individually erasable, lockable, and unlockable in-
system. The memory map is shown in Fig. 1.
SmartVoltage technology provides a choice of V
and V
meet system performance and power expectations.
2.7 to 3.6 V V
• SmartVoltage Technology
• Enhanced Suspend Capabilities
• In-System Block Locking
• Permanent Lock Capability,
• V
• To take advantage of SmartVoltage technology,
• Once set the permanent lock bit, the blocks
3.3 V and 5 V block erase, word write, and lock-
bit configuration operations. Designs that switch
V
that the V
allow V
which have been set block lock-bit can not be
erased, written forever.
PPLK
PP
PP
off during read operations should make sure
combinations, as shown in Table 1, to
has been lowered to 1.5 V to support
CC
PP
connection to 2.7 V, 3.3 V or 5 V.
CC
voltage transitions to GND.
consumes approximately one-fifth
CC
- 5 -
the power of 5 V V
highest read performance. V
5 V eliminates the need for a separate 12 V
converter, while V
and word write performance. In addition to flexible
erase and program voltages, the dedicated V
gives complete data protection when V
Internal V
matically configures the device for optimized read
and write operations.
A command User Interface (CUI) serves as the
interface between the system processor and
internal operation of the device. A valid command
sequence written to the CUI initiates device
automation. An internal Write State Machine (WSM)
automatically executes the algorithms and timing
necessary for block erase, word write, and lock-bit
configuration operations.
A block erase operation erases one of the device’s
32 k-word blocks typically within 1.2 second (5 V
V
block can be independently erased 100 000 times
(1.6 million block erases per device). Block erase
suspend mode allows system software to suspend
block erase to read data from, or write data to any
other block.
Writing memory data is performed in word
increments typically within 7.5 µs (5 V V
V
system to read data from, or write data to any other
flash memory array location.
CC
PP
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
Table 1 V
). Word write suspend mode enables the
, 12 V V
V
CC
VOLTAGE
2.7 V
3.3 V
CC
5 V
Offered by SmartVoltage Technology
PP
CC
and V
) independent of other blocks. Each
and V
PP
CC
= 12 V maximizes block erase
PP
. But, 5 V V
PP
detection circuitry auto-
Voltage Combinations
2.7 V, 3.3 V, 5 V, 12 V
PP
3.3 V, 5 V, 12 V
V
at 2.7 V, 3.3 V and
PP
5 V, 12 V
CC
VOLTAGE
provides the
PP
≤ V
CC
, 12 V
PP
PPLK
pin
.

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