LH28F800BJE-PBTL90 Sharp Electronics, LH28F800BJE-PBTL90 Datasheet - Page 4

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LH28F800BJE-PBTL90

Manufacturer Part Number
LH28F800BJE-PBTL90
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F800BJE-PBTL90

Cell Type
NOR
Density
8Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
20/19Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
1M/512K
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
LH28F800BJE-PBTL90
Manufacturer:
SHARP
Quantity:
196
Part Number:
LH28F800BJE-PBTL90
Manufacturer:
SHARP
Quantity:
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LH28F800BJE-PBTL90
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SHARP
Quantity:
20 000
The product is a high-density, low-cost, nonvolatile, read/write storage solution for a wide range of applications.
The product can operate at V
realize battery life and suits for cellular phone application.
Its Boot, Parameter and Main-blocked architecture, low voltage and extended cycling provide for highly flexible component
suitable for portable terminals and personal computers. Its enhanced suspend capabilities provide for an ideal solution for code
+ data storage applications.
For secure code storage applications, such as networking, where code is either directly executed out of flash or downloaded to
DRAM, the product offers four levels of protection: absolute protection with V
locking or flexible software block locking. These alternatives give designers ultimate control of their code security needs.
The product is manufactured on SHARP’s 0.25µm ETOX
48-lead TSOP, ideal for board constrained applications.
*ETOX is a trademark of Intel Corporation.
Low Voltage Operation
OTP(One Time Program) Block
User-Configurable ×8 or ×16 Operation
High-Performance Read Access Time
Operating Temperature
Low Power Management
Optimized Array Blocking Architecture
Extended Cycling Capability
V
3963 word + 4 word Program only array
90ns(V
0°C to +70°C
Typ. 2µA (V
Automatic Power Savings Mode Decreases I
Static Mode
Typ. 120µA (V
Read Current
Two 4K-word (8K-byte) Boot Blocks
Six 4K-word (8K-byte) Parameter Blocks
Fifteen 32K-word (64K-byte) Main Blocks
Bottom Boot Location
Minimum 100,000 Block Erase Cycles
CC
=V
CC
CCW
=2.7V-3.6V)
=2.7V-3.6V Single Voltage
CC
CC
=3.0V) Standby Current
=3.0V, T
8M-BIT ( 512Kbit ×16 / 1Mbit ×8 )
CC
=2.7V-3.6V and V
A
Boot Block Flash MEMORY
=+25°C, f=32kHz)
LH28F800BJE-PBTL90
CCR
CCW
in
=2.7V-3.6V or 11.7V-12.3V. Its low voltage operation capability
TM*
process technology. It come in industry-standard package: the
Enhanced Automated Suspend Options
Enhanced Data Protection Features
Automated Block Erase, Full Chip Erase,
Word/Byte Write and Lock-Bit Configuration
SRAM-Compatible Write Interface
Industry-Standard Packaging
ETOX
CMOS Process (P-type silicon substrate)
Not designed or rated as radiation hardened
Word/Byte Write Suspend to Read
Block Erase Suspend to Word/Byte Write
Block Erase Suspend to Read
Absolute Protection with V
Block Erase, Full Chip Erase, Word/Byte Write and
Lock-Bit Configuration Lockout during Power
Transitions
Block Locking with Command and WP#
Permanent Locking
Command User Interface (CUI)
Status Register (SR)
48-Lead TSOP
TM*
Nonvolatile Flash Technology
CCW
V
CCWLK
, selective hardware block
CCW
V
CCWLK
Rev. 1.27

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