TE28F800B3TA110 Intel, TE28F800B3TA110 Datasheet - Page 9

• Manufacturer Part Number: TE28F800B3TA110
• Manufacturer: Intel

Specifications of TE28F800B3TA110

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 110ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 19b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

Datasheet
The B3 flash memory device family is available in either x8 or x16 packages in the following
densities (see
The parameter blocks are located at either the top (denoted by -T suffix) or the bottom (-B suffix)
of the address map in order to accommodate different microprocessor protocols for kernel code
location. The upper two (or lower two) parameter blocks can be locked to provide complete code
security for system initialization code. Locking and unlocking is controlled by Write Protect WP#
(see
The Command User Interface (CUI) serves as the interface between the microprocessor or
microcontroller and the internal operation of the flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and timings necessary for Program and Erase
operations, including verification, thereby unburdening the microprocessor or microcontroller. The
Status Register indicates the status of the WSM by signifying block erase or word program
completion and status.
The B3 flash memory device is also designed with an Automatic Power Savings (APS) feature,
which minimizes system current drain and allows for very low power designs. This mode is entered
following the completion of a read cycle (approximately 300 ns later).
The RP# pin provides additional protection against unwanted command writes that may occur
during system reset and power-up/down sequences due to invalid system bus conditions (see
“Power and Reset Specifications” on page
Section 10.0, “Operations Overview” on page 52
of operation.
Characteristics” on page 38
8.1, “AC Read Characteristics” on page 38
specifications.
•
•
•
•
8-Mbit (8, 388, 608-bit) flash memory organized as 512 Kwords of 16 bits each or 1024
Kbytes of 8-bits each
16-Mbit (16, 777, 216-bit) flash memory organized as 1024 Kwords of 16 bits each or
2048 Kbytes of 8-bits each
32-Mbit (33, 554, 432-bit) flash memory organized as 2048 Kwords of 16 bits each
64-Mbit (67, 108, 864-bit) flash memory organized as 4096 Kwords of 16 bits each
Section 12.0, “Block Locking” on page 60
Section 7.0, “Electrical Specifications” on page 35
Appendix C, “Ordering Information,”
provide complete current and voltage specifications. Refer to
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
49).
for read, program, and erase performance
for details).
gives detailed explanation of the different modes
for availability):
and
Section 8.0, “AC
Section
9