CY62128DV30LL-55SI Cypress Semiconductor Corp, CY62128DV30LL-55SI Datasheet - Page 5

• Manufacturer Part Number: CY62128DV30LL-55SI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62128DV30LL-55SI

• Density: 1Mb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 2.5/3.3V
• Address Bus: 17b
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 10mA
• Operating Supply Voltage (min): 2.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05231 Rev. *H
Switching Characteristics
Switching Waveforms
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
DATA OUT
Read Cycle No. 1 (Address Transition Controlled)
ADDRESS
Notes:
10. At any given temperature and voltage condition, t
11. t
12. The internal write time of the memory is defined by the overlap of WE, CE
13. Device is continuously selected. OE, CE
14. WE is HIGH for Read cycle.
9. Test conditions assume signal transition time of 1V/ns or less, timing reference levels of V
the specified I
HZOE
Parameter
, t
HZCE
[12]
, t
OL
HZBE
.
, and t
PREVIOUS DATA VALID
HZWE
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE
CE
CE
CE
Write Cycle Time
CE
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE LOW to High Z
WE HIGH to Low Z
transitions are measured when the outputs enter a high-impedance state.
1
1
1
1
1
1
LOW or CE
LOW or CE
HIGH or CE
LOW or CE
HIGH or CE
LOW or CE
(Over the Operating Range)
1
= V
IL
t
, CE
OHA
Description
HZCE
2
2
2
2
2
2
HIGH to Data Valid
HIGH to Low Z
HIGH to Power-up
HIGH to Write End
[10]
LOW to High Z
LOW to Power-down
2
[10, 11]
[10]
[10, 11]
= V
is less than t
IH
.
t
AA
[13, 14]
LZCE
[10]
[10, 11]
, t
1
HZBE
[9]
= V
IL
is less than t
t
, and CE
RC
2
CY62128DV30-55
CC(typ.)
= V
Min.
LZBE
55
10
10
55
40
40
40
25
10
5
0
0
0
0
IH
. All signals.
/2, input pulse levels of 0 to V
, t
HZOE
is less than t.
Max.
55
55
25
20
20
55
20
DATA VALID
CY62128DV30-70
Min.
70
10
10
70
60
60
50
30
10
5
0
0
0
0
CY62128DV30
CC(typ.)
, and output loading of
Max.
70
70
35
25
25
70
25
Page 5 of 11
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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