CY7C1021CV33-12BAI Cypress Semiconductor Corp, CY7C1021CV33-12BAI Datasheet

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CY7C1021CV33-12BAI

Manufacturer Part Number
CY7C1021CV33-12BAI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1021CV33-12BAI

Density
1Mb
Access Time (max)
12ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
16b
Package Type
FBGA
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
85mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
16b
Number Of Words
64K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1021CV33-12BAI
Manufacturer:
CYP
Quantity:
20 000
Company:
Part Number:
CY7C1021CV33-12BAI
Quantity:
10
Part Number:
CY7C1021CV33-12BAIT
Manufacturer:
CYPRESS
Quantity:
1 831
Features
Cypress Semiconductor Corporation
Document Number: 38-05132 Rev. *J
Temperature ranges
Pin and function compatible with CY7C1021BV33
High speed
CMOS for optimum speed and power
Low active power: 325 mW (max)
Automatic power down when deselected
Independent control of upper and lower bits
Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin
TSOP II, and 48-Ball FBGA packages
Logic Block Diagram
Commercial: 0°C to 70°C
Industrial: –40°C to 85°C
Automotive-A: –40°C to 85°C
Automotive-E: –40°C to 125°C
t
t
t
AA
AA
AA
= 8 ns (Commercial)
= 10 ns (Industrial and Automotive-A)
= 12 ns (Automotive-E)
A
A
A
A
A
A
A
A
1
0
7
6
5
4
3
2
DATA IN DRIVERS
COLUMN DECODER
198 Champion Court
RAM Array
64K x 16
Functional Description
The CY7C1021CV33 is a high performance CMOS static RAM
organized as 65,536 words by 16 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected.
Writing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is
LOW, then data from I/O pins (I/O
the location specified on the address pins (A
Byte High Enable (BHE) is LOW, then data from I/O pins (I/O
through I/O
pins (A
Reading from the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appear
on I/O
memory appears on I/O
“Truth Table”
Write modes.
The input and output pins (I/O
high impedance state when the device is deselected (CE HIGH),
the outputs are disabled (OE HIGH), the BHE and BLE are
disabled (BHE, BLE HIGH), or during a write operation (CE LOW
and WE LOW).
For best practice recommendations, refer to the Cypress
application note
1
0
to I/O
through A
1-Mbit (64K x 16) Static RAM
16
San Jose
8
) is written into the location specified on the address
on page 10 for a complete description of Read and
. If Byte High Enable (BHE) is LOW, then data from
AN1064, SRAM System
15
).
,
CA 95134-1709
9
to I/O
I/O
I/O
0
8
16
BHE
WE
CE
OE
BLE
1
–I/O
–I/O
. For more information, see the
through I/O
1
7
15
through I/O
Revised February 16, 2010
CY7C1021CV33
Guidelines.
16
0
) are placed in a
8
through A
), is written into
408-943-2600
15
). If
9
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Related parts for CY7C1021CV33-12BAI

CY7C1021CV33-12BAI Summary of contents

Page 1

... Cypress Semiconductor Corporation Document Number: 38-05132 Rev. *J 1-Mbit (64K x 16) Static RAM Functional Description The CY7C1021CV33 is a high performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected. ...

Page 2

... Pin Configuration ............................................................. 3 Pin Definitions .................................................................. 4 Maximum Ratings............................................................. 5 Operating Range............................................................... 5 Electrical Characteristics................................................. 5 Capacitance ...................................................................... 6 Thermal Resistance.......................................................... 6 Document Number: 38-05132 Rev. *J CY7C1021CV33 Switching Characteristics ............................................... 7 Switching Waveforms ...................................................... 8 Truth Table...................................................................... 10 Ordering Information ..................................................... 11 Package Diagrams ......................................................... 12 Document History Page................................................. 15 Sales, Solutions, and Legal Information ...................... 16 Worldwide Sales and Design Support....................... 16 Products ...

Page 3

... NC pins are not connected on the die. Document Number: 38-05132 Rev - Commercial 95 90 Industrial 90 Automotive-A 90 Automotive-E Commercial 5 5 Industrial 5 5 Automotive-A 5 Automotive-E [1] Figure 2. 48-Ball FBGA Pinout BLE OE BHE I/O BLE I/O 16 I/O I/O 15 I I/O 12 I/O 11 I/O I CY7C1021CV33 - BHE CE I I/O I I ...

Page 4

... When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, the I/O pins are tristated and act as input data pins. Ground Ground for the Device. Connected to ground of the system. Power Supply Power Supply Inputs to the Device. CY7C1021CV33 Description – I ...

Page 5

... MAX Automotive-E , Commercial 5 CC – 0.3V, CC Industrial > V – 0.3V, CC Automotive-A < 0.3V Automotive-E CY7C1021CV33 Ambient V Temperature ( 3.3V ± 10% 0°C to +70°C –40°C to +85°C –40°C to +85°C –40°C to +125°C -10 -12 -15 Min Max Min Max Min Max 2 ...

Page 6

... Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA/JESD51 Figure 3. AC Test Loads and Waveforms 10-, 12-, 15-ns devices: 50 Ω 30 pF* 1.5V (a) ALL INPUT PULSES 90% 10% (c) Fall Time: 1 V/ns CY7C1021CV33 . Max Unit 8 8 SOJ TSOP II FBGA 65.06 76.92 95.32 34.21 15.86 10 ...

Page 7

... Max 100 100 values until the first memory access is performed less than less than t , and t LZCE HZOE LZOE HZWE “AC Test Loads and Waveforms CY7C1021CV33 -12 -15 Min Max Min Max 100 100 less than t for any given device. LZWE [4] ” on page 6. Transition is measured ...

Page 8

... Device is continuously selected. OE, CE, BHE, and/or BLE = V 12 HIGH for read cycle. 13. Address valid prior to or coincident with CE transition LOW. Document Number: 38-05132 Rev OHA DOE t LZOE DBE DATA VALID 50 CY7C1021CV33 [11, 12] DATA VALID [12, 13] t HZOE t HZCE t HZBE HIGH IMPEDANCE 50 Page [+] Feedback ...

Page 9

... SA BHE, BLE WE CE DATA I/O Notes 14. Data I/O is high impedance if OE, BHE, and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state. Document Number: 38-05132 Rev. *J [14, 15 SCE PWE PWE t SCE CY7C1021CV33 Page [+] Feedback ...

Page 10

... Data Out Read – Upper Bits Only Data In Data In Write – All Bits Data In High Z Write – Lower Bits Only High Z Data In Write – Upper Bits Only High Z High Z Selected, Outputs Disabled High Z High Z Selected, Outputs Disabled CY7C1021CV33 LZWE Power Standby ( Active ( Active (I ) ...

Page 11

... FBGA (Pb-free) CY7C1021CV33-10ZXI 51-85087 44-pin TSOP Type II (Pb-free) CY7C1021CV33-10ZSXA 51-85087 44-pin TSOP Type II (Pb-free) 12 CY7C1021CV33-12ZXC 51-85087 44-pin TSOP Type II (Pb-free) CY7C1021CV33-12BAI 51-85096 48-ball FBGA CY7C1021CV33-12VXE 51-85082 44-pin (400-Mil) Molded SOJ (Pb-free) CY7C1021CV33-12ZSXE 51-85087 44-pin TSOP Type II (Pb-free) 15 CY7C1021CV33-15ZXC 51-85087 44-pin TSOP Type II (Pb-free) ...

Page 12

... Document Number: 38-05132 Rev. *J Figure 9. 44-Pin (400 Mil) Molded SOJ 23 0.395 0.405 0.435 0.445 22 SEATING PLANE 0.128 0.148 0.004 0.050 TYP. 0.025 MIN. CY7C1021CV33 DIMENSIONS IN INCHES MIN. MAX. 0.082 0.007 MIN. 0.013 0.365 0.375 0°-10° 51-85082-*C Page [+] Feedback ...

Page 13

... DIMENSION IN MM (INCH) MAX MIN. Document Number: 38-05132 Rev. *J PIN 1 I. BASE PLANE 0.10 (.004) 0°-5° SEATING PLANE CY7C1021CV33 EJECTOR PIN BOTTOM VIEW 10.262 (0.404) 10.058 (0.396) 0.210 (0.0083) 0.120 (0.0047) 0.597 (0.0235) ...

Page 14

... TOP VIEW PIN 1 CORNER (LASER MARK 7.00±0.10 SIDE VIEW SEATING PLANE C Document Number: 38-05132 Rev. *J Figure 11. 48-Ball FBGA ( 1.2 mm 0.15(4X) 1.20 MAX. CY7C1021CV33 BOTTOM VIEW PIN 1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 0.75 3.75 7.00±0.10 B 51-85096 *H Page [+] Feedback ...

Page 15

... Document History Page Document Title: CY7C1021CV33, 1-Mbit (64K x 16) Static RAM Document Number: 38-05132 ECN NO. Submission Orig. of REV. Date Change ** 109472 12/06/01 HGK *A 115044 05/08/02 HGK *B 115808 06/25/02 HGK *C 120413 10/31/02 DFP *D 238454 See ECN RKF *E 334398 See ECN SYT *F 493565 ...

Page 16

... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-05132 Rev. *J All product and company names mentioned in this document are the trademarks of their respective holders. cypress.com/go/plc Revised February 16, 2010 CY7C1021CV33 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...

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