AM29LV128MH123REI Spansion Inc., AM29LV128MH123REI Datasheet
AM29LV128MH123REI
Specifications of AM29LV128MH123REI
Related parts for AM29LV128MH123REI
AM29LV128MH123REI Summary of contents
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Am29LV128MH/L Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29GL256N supersedes Am29LV128MH/L and is the factory-recommended migration path. Please refer to the S29GL256N datasheet for specifications and ordering information. Availability ...
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... Data# polling & toggle bits provide status — Unlock Bypass Program command reduces overall multiple-word or byte programming time — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices Hardware features — ...
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... The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. The device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses have been stable for a specified period of time ...
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... Hardware Data Protection ............................................................ 25 Low VCC Write Inhibit ............................................................ 25 Write Pulse “Glitch” Protection ............................................... 25 Logical Inhibit .......................................................................... 25 Power-Up Write Inhibit ............................................................ 25 Common Flash Memory Interface (CFI Table 6. CFI Query Identification String .............................. 26 Table 7. System Interface String......................................................26 Table 8. Device Geometry Definition................................... 27 Table 9. Primary Vendor-Specific Extended Query............. 28 Command Definitions . . . . . . . . . . . . . . . . . . . . . 29 Reading Array Data ...
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PRODUCT SELECTOR GUIDE Part Number Regulated Voltage Range V = 3.0–3 Speed/ Voltage Option Full Voltage Range V = 2.7–3 Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page access time (t ) PACC ...
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CONNECTION DIAGRAMS NC 1 A22 2 A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 12 WE# 13 RESET# 14 A21 15 WP#/ACC 16 RY/BY# 17 A18 18 A17 19 ...
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... A12 WE# RESET RY/BY# WP#/ACC A17 Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package and/or data integrity may be compromised if the 64- Ball Fortified BGA Top View, Balls Facing Down A14 A15 A16 BYTE# ...
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PIN DESCRIPTION A22– Address inputs DQ14–DQ0 = 15 Data inputs/outputs DQ15/A-1 = DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# = Chip Enable input OE# = Output Enable input WE# = Write Enable input ...
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... AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: Am29LV128MH/L H 123R PC DEVICE NUMBER/DESCRIPTION Am29LV128MH/L 128 Megabit ( 16-Bit/ 8-Bit) MirrorBit Uniform Sector Flash Memory with VersatileIO™ Control, 3.0 Volt-only Read, Program, and Erase Valid Combinations for Speed TSOP Package (ns) Range Am29LV128MH93R 90 3.0– ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch ...
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Requirements for Reading Array Data To read array data from the outputs, the system must drive the CE# and OE# pins control and selects the device. OE# is the output con- trol and gates array data to ...
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... CMOS standby current ( but not within greater. The RESET# pin may be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash + ACC memory, enabling the system to read the boot-up firm- ware from the Flash memory. See the tables in RESET# parameters and to agram ...
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Table 2. Sector Address Table (Sheet Sector A22–A15 SA0 SA1 SA2 SA3 SA4 SA5 ...
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Table 2. Sector Address Table (Sheet Sector A22–A15 SA47 SA48 SA49 SA50 SA51 SA52 ...
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Table 2. Sector Address Table (Sheet Sector A22–A15 SA95 SA96 SA97 SA98 SA99 SA100 ...
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Table 2. Sector Address Table (Sheet Sector A22–A15 SA143 SA144 SA145 SA146 SA147 SA148 ...
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Table 2. Sector Address Table (Sheet Sector A22–A15 SA191 SA192 SA193 SA194 SA195 SA196 ...
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Table 2. Sector Address Table (Sheet Sector A22–A15 SA239 SA240 SA241 SA242 SA243 SA244 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector group protection verifica- tion, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be pro- grammed ...
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... The device is shipped with all sector groups unpro- tected. AMD offers the option of programming and pro- tecting sector groups at its factory prior to shipping the device through AMD’s ExpressFlash™ Service. Con- tact an AMD representative for details possible to determine whether a sector group is protected or unprotected. See “ ...
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Write Protect (WP#) The Write Protect function provides a hardware method of protecting the first or last sector group with- out using V . Write Protect is one of two functions pro- ID vided by the WP#/ACC input. If the ...
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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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... ESN Factory Locked devices. Customers may opt to have their code programmed by AMD through the AMD ExpressFlash service (Express Flash Factory Locked). The devices are then shipped from AMD’s factory with the Secured Silicon Sector permanently locked. Contact an AMD representative for details on using AMD’ ...
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... COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices ...
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Addresses (x16) Data 10h 0051h 11h 0052h 12h 0059h 13h 0002h 14h 0000h 15h 0040h 16h 0000h 17h 0000h 18h 0000h 19h 0000h 1Ah 0000h Addresses (x16) Data 1Bh 0027h 1Ch 0036h 1Dh 0000h 1Eh 0000h 1Fh 0007h 20h 0007h ...
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... Table 8. Device Geometry Definition Description N Device Size = 2 byte Flash Device Interface description (refer to CFI publication 100) Max. number of byte in multi-byte write = 2 (00h = not supported) Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) ...
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Table 9. Primary Vendor-Specific Extended Query Addresses (x16) Data 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0033h 45h 0008h 46h 0002h 47h 0001h 48h 0001h 49h 0004h 4Ah 0000h 4Bh 0000h 4Ch 0001h 4Dh 00B5h 4Eh 00C5h 0004h/ ...
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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device op- erations. Table 10 and Table 11 register command sequences. Writing incorrect ad- dress and data values or writing them in the improper ...
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... This tells the device how many write buffer addresses will be loaded with data and therefore when to expect the Program Buffer to Flash command. The number of locations to program cannot exceed the size of the write buffer or the operation will abort ...
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... Once the specified number of write buffer locations have been loaded, the system must then write the Pro- gram Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer Programming operation. The device then begins programming. Data polling should be used while monitoring the last address location loaded into the write buffer ...
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... Sector Address Write first address/data Yes Abort Write to Buffer Operation? (Note 1) Write next address/data pair Write program buffer to flash sector address Read DQ7 - DQ0 at Last Loaded Address DQ7 = Data DQ1 = 1? DQ5 = 1? Yes Read DQ7 - DQ0 with address = Last Loaded ...
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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Table 10 and Table 11 for program command sequence. Figure 5. Program Operation January 31, 2007 ...
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Program Operation or Write-to-Buffer Sequence in Progress Write Program Suspend Write address/data Command Sequence XXXh/B0h Command is also valid for Erase-suspended-program operations Wait 15 μs Autoselect and SecSi Sector Read data as read operations are also allowed required Data cannot ...
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... When an erase operation is suspended, any of the internal operations that were not fully com- pleted must be restarted. As such, if this flash device is continually issued suspend/resume commands in rapid succession, erase progress will be impeded as a function of the number of suspends. The result will be a longer cumulative erase time than without suspends ...
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START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System No Data = FFh? Yes Erasure Completed Figure 7. Erase Operation Notes: 1. See Table 10 and Table 11 for erase command sequence. 2. See ...
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... Sector Group Protect Verify 4 (Note 12) Enter Secured Silicon Sector Region 3 Exit Secured Silicon Sector Region 4 Program 4 Write to Buffer (Note 11) 3 Program Buffer to Flash 1 Write to Buffer Abort Reset (Note 13) 3 Unlock Bypass 3 Unlock Bypass Program (Note 14) 2 Unlock Bypass Reset (Note 15) 2 Chip Erase ...
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... Sector Group Protect Verify 4 (Note 12) Enter Secured Silicon Sector Region 3 Exit Secured Silicon Sector Region 4 Program 4 Write to Buffer (Note 11) 3 Program Buffer to Flash 1 Write to Buffer Abort Reset (Note 13) 3 Unlock Bypass 3 Unlock Bypass Program (Note 14) 2 Unlock Bypass Reset (Note 15) 2 Chip Erase ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 12 and the following subsections describe the function of these bits. DQ7 and DQ6 each ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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START Read DQ7–DQ0 Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Program/Erase Complete, Write Operation Complete Reset Command Note: The system should recheck ...
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In this case, the system must start at the beginning of the algorithm when it returns to de- termine the status of the operation (top of Figure 9). DQ5: Exceeded Timing Limits DQ5 indicates whether the program, ...
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Status Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Program-Suspended Program Program- Sector Suspend Suspend Non-Program Mode Read Suspended Sector Erase-Suspended Erase- Sector Suspend Erase Non-Erase Suspended Read Suspend Sector Mode Erase-Suspend-Program (Embedded Program) Busy (Note 3) Write-to- Buffer Abort ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Parameter Description Symbol (Notes) I Input Load Current ( A9, ACC Input Load Current LIT I Output Leakage Current LO I Reset Leakage Current LR V Active Read Current CC I CC1 (2, ...
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TEST CONDITIONS Device Under Test C 6.2 kΩ L Note: Diodes are IN3064 or equivalent Figure 12. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Note < ...
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AC CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t ...
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AC CHARACTERISTICS A22-A2 A1-A0* Data Bus CE# OE# * Figure shows word mode. Addresses are A1–A-1 for byte mode Same Page PACC PACC t ACC Qa ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width RP ...
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AC CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t ...
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RY/BY# CE#, OE# RESET# RY/BY# CE#, OE# RESET# January 31, 2007 25270C7 Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...
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AC CHARACTERISTICS Addresses t POLL CE OE# t OEH WE# DQ15 and DQ7 DQ14–DQ8, DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data ...
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AC CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 (first read) RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array ...
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AC CHARACTERISTICS Temporary Sector Group Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: 1. Not 100% tested Specifications listed are tested ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Group Protect or Unprotect Data 60h 1 µs CE# WE# OE# * For sector group protect For sector group ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Single Word Program Time (Note 3) Accelerated Single Word Program Time (Note 3) Total Write Buffer Program Time (Note Per Byte Effective Write Buffer Program Time (Note 5) Per ...
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TSOP PIN AND BGA PACKAGE CAPACITANCE Parameter Symbol Parameter Description C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A ...
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PHYSICAL DIMENSIONS TS056/TSR056—56-Pin Standard/Reverse Thin Small Outline Package (TSOP) PACKAGE TS/TSR 56 JEDEC MO-142 (B) EC SYMBOL MIN. NOM. MAX. A --- --- 1.20 A1 0.05 --- 0.15 A2 0.95 1.00 1.05 b1 0.17 0.20 0.23 b 0.17 0.22 0.27 ...
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PHYSICAL DIMENSIONS LAA064—64-Ball Fortified Ball Grid Array Package January 31, 2007 25270C7 Am29LV128MH/L 63 ...
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... Customer Lockable: Secured Silicon Sector NOT Programmed or Protected at the factory. Added second bullet, Secured Silicon sector-protect verify text and figure 3. Secured Silicon Sector Flash Memory Region, and Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence Noted that the ACC function and unlock bypass modes are not available when the Secured Silicon sector is en- abled ...
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... Added note 4. Revision C (May 16, 2003) Global Converted to full data sheet version. Modified Secured Silicon Sector Flash Memory Region section to in- clude ESN references. Changed data sheet title to Am29LV128MH/L. Erase and Programming Performance Input values into table that were previously TBD. Modi- fied notes ...
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... Copyright © 2005–2007 Spansion Inc. All Rights Reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof are trademarks of Spansion Inc. Other names are for informational purposes only and may be trademarks of their respective owners. 66 ...