PCF8576CH NXP Semiconductors, PCF8576CH Datasheet - Page 36

PCF8576CH

Manufacturer Part Number
PCF8576CH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF8576CH

Operating Supply Voltage (typ)
2.5/3.3/5V
Number Of Digits
20
Number Of Segments
160
Package Type
LQFP
Pin Count
64
Mounting
Surface Mount
Power Dissipation
400mW
Frequency (max)
315KHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Lead Free Status / Rohs Status
Compliant

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NXP Semiconductors
PCF8576C_9
Product data sheet
The SYNC line is provided to maintain the correct synchronization between all cascaded
PCF8576Cs. This synchronization is guaranteed after the power-on reset. The only time
that SYNC is likely to be needed is if synchronization is accidentally lost (e.g. by noise in
adverse electrical environments; or by the defining a multiplex mode when PCF8576Cs
with differing SA0 levels are cascaded).
SYNC is organized as an input/output pin; the output selection being realized as an
open-drain driver with an internal pull-up resistor. A PCF8576C asserts the SYNC line
and monitors the SYNC line at all other times. If synchronization in the cascade is lost, it is
restored by the first PCF8576C to assert SYNC. The timing relationship between the
backplane waveforms and the SYNC signal for the various drive modes of the PCF8576C
are shown in
For single plane wiring of packaged PCF8576Cs and chip-on-glass cascading, see
Figure
.
Fig 29. Cascaded PCF8576C configuration
V
V
V
LCD
CONTROLLER
DD
PROCESSOR/
SS
31.
MICRO-
MICRO-
HOST
R
Figure
2C B
t r
30.
Rev. 09 — 9 July 2009
SYNC
OSC
SDA
CLK
SCL
SYNC
SDA
SCL
CLK
OSC
1
2
3
4
6
7
A0
1
2
3
4
6
Universal LCD driver for low multiplex rates
5
PCF8576CT
A0
V
8
DD
A1
PCF8576CT
5
V
A1
9
DD
A2
12
A2 SAO V
V
12
10
17 to 56
LCD
SA0 V
V
13,15,
14,16
17 to 56
LCD
13,15,
14,16
11
SS
SS
40 segment drives
40 segment drives
4 backplanes
BP0 to BP3
BP0 to BP3
(open-circuit)
PCF8576C
© NXP B.V. 2009. All rights reserved.
LCD PANEL
(up to 2560
elements)
mbe533
36 of 56

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