SC28L202A1DGG NXP Semiconductors, SC28L202A1DGG Datasheet - Page 2

• Manufacturer Part Number: SC28L202A1DGG
• Description: UART Interface IC 3-5V 2CH UART 3MBPS 256B FIFO
• Manufacturer: NXP Semiconductors
• Type: Dual universal asynchronous receiver/transmitter (DUART)r

Specifications of SC28L202A1DGG

• Number Of Channels: 2
• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Supply Current: 20mA
• Data Rate: 2 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-56
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V, 5 V
• Lead Free Status / Rohs Status: Compliant

www.nxp.com
Each receiver and transmitter is buffered
by a 256-character FIFO. This essentially
eliminates receiver over-run and trans-
mitter under-run, and reduces interrupt
overhead in interrupt-driven systems.
For added security, the flow-control
capability of each UART channel can
disable a remote transmitter when the
receiver is full.
Programmable options
Each UART channel supports baud rates
up to 3.125 Mbps and is compatible
with 3- and 5-V operation. The channel
modes and data formats for each chan-
nel are fully programmable. Each channel
has a character-recognition system that
can be used for general-purpose or Xon/
Xoff character recognition, or for address
recognition during wake-up mode.
Each receiver and transmitter can select
its operating speed as one of twenty-
seven fixed baud rates, as a 16x clock
derived from one of two programmable
counter/timers, or as an external 1x or 16x
clock. The baud-rate generator and the
counter/timer can operate directly from a
crystal or from external clock inputs.
Each channel is supported by an 8-bit
I/O, for a total of sixteen programmable
I/O. The I/O are typically used for mo-
dem control and DMA interfaces, or as
general-purpose I/O ports. All the ports
have change-of-state detectors. The
input sections are always active, so out-
put signals are available to the internal
circuits as well as to the processor.
Versatile arbitrating interrupt system
The interrupt system in each UART chan-
nel fully supports “single-query” polling.
Each output port can be configured
to provide a total of six separate inter-
© 2006 NXP N.V.
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rupt-type outputs that can be switched
to open drain (wire-ORed). Each FIFO
can be programmed independently for
up to 256 interrupt levels, and there is a
Watchdog timer and receiver time-out
for each receiver.
Other features include line-break detec-
tion and generation, automatic RS-485
SC28L202 block diagram
Ordering information
Recommended application notes
Read/write
Type number
SC28L201A1DGG
SC28L202A1DGG
Document number
AN10313
AN10380
Data (7:0)
I/O (15:0)
A (6:0)
IRQN
I/M
X
X
1
2
Interrupt request
Timing baud-rate
Change of state
Title
Reduce CPU overhead with Intelligence Interrupt Arbitration (I
Ensure data integrity with real-time error detection
Bus interface
generator
Oscillator
Counter/
Timer
COS
UART channel
1 (Single)
2 (Dual)
26
Timing
Interrupt arbitration
Arbitration bus
Priority register
(wake-up) mode for multi-drop applica-
tions, start-end break interrupt/status,
power-saving items such as on-chip crys-
tal oscillator with power-down mode.
For more information about the DUARTs,
please visit www.nxp.com/interface.
Email your technical questions to
[e-mail].
Data bus
Package
TSSOP48
TSSOP56
Real-time error detect
Character recognition
Break-change defect
Rx FIFO (256 bytes)
Date of release: November 2006
Document order number: 9397 750 15765
Printed in the USA
Tx shift register
Rx shift register
Rx Watchdog
Interrupt vector
Channel A
Channel B
Tx FIFO
Rx error
Delay
Dimensions
12.5 x 6.1 x 1.2 mm
14.0 x 6.1 x 1.2 mm
2
A) feature
Tx
Rx
Tx
Rx