IDT821068PX IDT, Integrated Device Technology Inc, IDT821068PX Datasheet

IDT821068PX

Manufacturer Part Number
IDT821068PX
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
General Purposer
Datasheet

Specifications of IDT821068PX

Number Of Adc's
8
Number Of Dac's
8
Interface Type
Serial
Power Supply Type
Analog/Digital
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Pin Count
128
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Screening Level
Industrial
Package Type
PQFP
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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FEATURES
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc
INDUSTRIAL TEMPERATURE RANGE
2003 Integrated Device Technology, Inc.
8 channel CODEC with on-chip digital filters
Programmable A/ -law compressed or linear code conversion
Meets ITU-T G.711 - G.714 requirements
Programmable digital filter adapting to system demands:
- AC impedance matching
- Transhybrid balance
- Frequency response correction
- Gain setting
Supports two programmable PCM buses and one GCI bus
Flexible PCM interface with up to 128 programmable time slots,
data rate from 512 kbits/s to 8.192 Mbits/s
Broadcast mode for coefficient setting
7 SLIC signaling pins (including 2 debounced pins) per channel
Fast hardware ring trip mechanism
Two programmable tone generators per channel for testing,
ringing and DTMF generation
3 Outputs
CHCLK1
CHCLK2
2 Inputs
VOUT1
MCLK
2 I/Os
VIN1
PLL and Clock
Generation
SLIC Signaling
Filter and A/D
D/A and Filter
OCTAL PROGRAMMABLE PCM CODEC
CH2
CH3
CH4
CH1
CCLK
/TS
MPI
Serial Interface
Control Logic
CS
General
INT RESET
Core
DSP
1
DOUBLE
CI/
Programmable teletax signal generation (12 kHz or 16 kHz)
FSK generator
Two programmable chopper clocks
Master clock frequency selectable: 1.536 MHz, 1.544 MHz, 2.048
MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or
8.192 MHz
Advanced test capabilities
- 3 analog loopback tests
- 5 digital loopback tests
- Level metering function
High analog driving capability (300
TTL and CMOS compatible digital I/O
CODEC identification
+5 V single power supply
Operating temperature range: - 40°C to + 85°C
Package available: 128 pin PQFP
CO
/FSC
SLIC Signaling
FS
Filter and A/D
D/A and Filter
PCM/GCI Interface
CH6
CH7
CH8
CH5
BCLK
/DCL
TSX1 TSX2
DECEMBER 08, 2003
AC)
VIN5
VOUT5
2 Inputs
3 Outputs
DR1/DD
DR2
DX1/DU
DX2
2 I/Os
IDT821068
DSC-6033/7

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IDT821068PX Summary of contents

Page 1

FEATURES 8 channel CODEC with on-chip digital filters Programmable A/ -law compressed or linear code conversion Meets ITU-T G.711 - G.714 requirements Programmable digital filter adapting to system demands impedance matching - Transhybrid balance - Frequency response correction ...

Page 2

IDT821068 OCTAL PROGRAMMABLE PCM CODEC DESCRIPTION The IDT821068 is a feature rich, single-chip, programmable 8 channel PCM CODEC with on-chip filters. Besides the A-Law/ -Law companding and linear coding/decoding (16-bit 2’s complement), IDT821068 provides 2 programmable Tone generators per channel ...

Page 3

IDT821068 OCTAL PROGRAMMABLE PCM CODEC PIN DESCRIPTION Name Type Pin Number GNDA1 GNDA2 GNDA3 GNDA4 - GNDA5 GNDA6 GNDA7 GNDA8 GNDAS - GND12 GND34 - GND56 GND78 GNDDP - VDDA12 VDDA34 - VDDA56 VDDA78 VDDAS - VDD12 VDD34 - VDD56 ...

Page 4

IDT821068 OCTAL PROGRAMMABLE PCM CODEC PIN DESCRIPTION (CONTINUED) Name Type Pin Number DR2 I 48 FS/FSC I 52 BCLK/DCL I 53 TSX1 47 O TSX2 109 CI/DOUBLE I 111 CO O 112 CCLK/TS I 110 MPI I ...

Page 5

IDT821068 OCTAL PROGRAMMABLE PCM CODEC FUNCTIONAL DESCRIPTION The IDT821068 performs the CODEC/filter functions required for the subscribe line interface circuitry in telecommunications system. IDT821068 converts analog voice signals to digital PCM samples and digital PCM samples back to analog voice ...

Page 6

IDT821068 OCTAL PROGRAMMABLE PCM CODEC CCLK Command Byte CO High 'Z' Figure 2. An Example of Serial Interface Read Mode (ID = 81h) FS BCLK Single Clock BCLK Double Clock Don't Care 6 5 ...

Page 7

IDT821068 OCTAL PROGRAMMABLE PCM CODEC GCI MODE In GCI mode, the GCI interface provides communication of both control and voice data between the GCI bus and SLIC over a pair of pins (DD and DU). The IDT821068 follows the GCI ...

Page 8

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Linear GCI Structure In GCI linear mode, one GCI frame consists of 8 GCI time slots, each GCI time slot consists of four 8-bit bytes. Four of the 8 time slots are used as Monitor ...

Page 9

IDT821068 OCTAL PROGRAMMABLE PCM CODEC C/I CHANNEL In both compressed GCI and linear GCI mode, the upstream and downstream C/I channel bytes are continuously carrying I/O information every frame to and from the IDT821068. In this way, the upstream processor ...

Page 10

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Master Device Monitor Transmitter Monitor Receiver Idle and RQT 1st Byte and RQT nth Byte ACK and RQT Wait for ACK MX ...

Page 11

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Idle 1st Byte REC Byte Valid and LL New Byte MR: MR bit calculated and transmitted on DU MX: MX ...

Page 12

IDT821068 OCTAL PROGRAMMABLE PCM CODEC DSP PROGRAMMING SIGNAL PROCESSING Several blocks are programmable for signal processing. This al- lows users to optimize the performance of the IDT821068 for the sys- tem. Figure 9 shows the Signal Flow for each channel ...

Page 13

IDT821068 OCTAL PROGRAMMABLE PCM CODEC DLB-DI ALB-DI DLB-TS DLB-8K ALB-8K DLB-1BIT ALB-1BIT DLB-ANA INDUSTRIAL TEMPERATURE RANGE 13 ...

Page 14

IDT821068 OCTAL PROGRAMMABLE PCM CODEC SLIC CONTROL The SLIC interface of IDT821068 for each channel consists of 7 pins: 2 inputs SI1 and SI2, 2 I/O pins SB1 and SB2, together with 3 outputs SO1, SO2 and SO3. SI1 AND ...

Page 15

IDT821068 OCTAL PROGRAMMABLE PCM CODEC CHOPPER CLOCK IDT821068 offers two programmable chopper clock outputs: CHCLK1 and CHCLK2. Both CHCLK1 and CHCLK2 are synchronous to MCLK. CHCLK1 outputs signal with programmable 2-28 ms clock cycle, while the frequency of CHCLK2 can ...

Page 16

IDT821068 OCTAL PROGRAMMABLE PCM CODEC FSK SIGNAL GENERATION The IDT821068 provides a FSK signal generator, which is used to send Caller-ID message. Generally, the procedure of sending Caller- ID FSK signal message is as the following: Step 1: Start, send ...

Page 17

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Start Read "FO" and "FS" bit in Global Command Set "Seizure length" in global Command 22 Set "Mark length" in global Command 23 Set "Flag length" in ...

Page 18

IDT821068 OCTAL PROGRAMMABLE PCM CODEC output to LMRL and LMRH. When L/C bit is 0, compressed PCM will be output transparently to LMRH. The calculation and method of level metering will be described in Application Note. TELETAX The teletax signal ...

Page 19

IDT821068 OCTAL PROGRAMMABLE PCM CODEC OPERATING THE IDT821068 PROGRAMMING DESCRIPTION The IDT821068 can be programmed very flexibly via the serial control interface (MPI mode) or GCI monitor channel (GCI mode). In both MPI mode and GCI mode, the programming is ...

Page 20

IDT821068 OCTAL PROGRAMMABLE PCM CODEC In GCI mode, both the location of time slot (determined by S1 and S0 pin) and the b4 bit in Program Start Byte would indicate which channel to be addressed. The b[4: Local ...

Page 21

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Only b[2: FSK-RAM Command are needed to address the 4 blocks in FSK-RAM, b3 should always be 0, and b4 always indicate the address is for FSK-RAM. The way of ...

Page 22

IDT821068 OCTAL PROGRAMMABLE PCM CODEC EXAMPLES OF GCI COMMANDS Examples of Local/Global Command and Coe-RAM/FSK-RAM Command are shown in Table 9 and Table 10, respectively. Table 9 - Local/Global Command Transmission Sequence in GCI Mode GCI Monitor Channel Downstream Program ...

Page 23

IDT821068 OCTAL PROGRAMMABLE PCM CODEC COMMANDS LIST NOTES Read command; R Write command 2. “R” in the command means that bit is reserved for future use, it must be fill in ‘0’ in write ...

Page 24

IDT821068 OCTAL PROGRAMMABLE PCM CODEC CE[ Disabled, Channel 2 can not receive Local Commands and Coe-RAM Commands (default); CE[ Enabled, Channel 2 can receive Local Commands and Coe-RAM Commands. CE[ Disabled, Channel 3 can ...

Page 25

IDT821068 OCTAL PROGRAMMABLE PCM CODEC CHCLK1_SEL[3:0] = 0101: CHCLK1 outputs digital signal at the frequency of 1000/10 Hz; CHCLK1_SEL[3:0] = 0110: CHCLK1 outputs digital signal at the frequency of 1000/12 Hz; CHCLK1_SEL[3:0] = 0111: CHCLK1 outputs digital signal at the ...

Page 26

IDT821068 OCTAL PROGRAMMABLE PCM CODEC SB1[2]: SB1 data on Channel 3 (default value is 0); SB1[3]: SB1 data on Channel 4 (default value is 0); SB1[4]: SB1 data on Channel 5 (default value is 0); SB1[5]: SB1 data on Channel ...

Page 27

IDT821068 OCTAL PROGRAMMABLE PCM CODEC SB2C[ SB2 pin on Channel 4 is configured as input (default); SB2C[ SB2 pin on Channel 4 is configured as output; SB2C[ SB2 pin on Channel 5 is configured ...

Page 28

IDT821068 OCTAL PROGRAMMABLE PCM CODEC 19. Level Meter Channel Select, Level Meter Mode Select, Level Meter On/off, Teletax Pulse Frequency and Dual Tone Output In- vert (33H/B3H), Read/Write Command I/O data R Level Meter Channel Select bits ...

Page 29

IDT821068 OCTAL PROGRAMMABLE PCM CODEC 23. FSK Mark Length (37H/B7H), Read/Write Command I/O data ML[7] Mark Length bits (ML[7:0]) determine the number of mark bits ‘1’ which will be transmitted in initial flag phase. The value is ...

Page 30

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Local Commands: 1. Coefficient Select (00H/80H), Read/Write Command I/O data CS[7] Coefficient Select bits (CS[7:0]) are used to control digital filters and function blocks on corresponding channel such as Impedance Matching Filter, ...

Page 31

IDT821068 OCTAL PROGRAMMABLE PCM CODEC 3. Teletax Gain Setting (02H/82H), Read/Write Command I/O data TGS[7] Teletax Gain Setting bits (TGS[7:0]) are used to set the gain of teletax on corresponding channel. The default value is ‘00H’ which ...

Page 32

IDT821068 OCTAL PROGRAMMABLE PCM CODEC 5. Dual Tone Frequency Setting (04H, 05H, 06H/84H, 85H, 86H), Read/Write Command I/O data T0[ Command I/O data T1[ Command I/O data T1[11] The decimal value ...

Page 33

IDT821068 OCTAL PROGRAMMABLE PCM CODEC 10. Teletax Ramp Start, D/A Gain, A/D Gain and Channel Power Down (0CH/8CH), Read/Write Command I/O data PD Teletax Ramp Start bit (RS) starts or stops the teletax on corresponding channel. RS ...

Page 34

IDT821068 OCTAL PROGRAMMABLE PCM CODEC ABSOLUTE MAXIMUM RATINGS Rating Com’I & Ind’I Power Supply Voltage Voltage on Any Pin with Respect to Ground Package Power Dissipation Storage Temperature NOTE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause ...

Page 35

IDT821068 OCTAL PROGRAMMABLE PCM CODEC TRANSMISSION CHARACTERISTICS 0 dBm0 is defined as 0.775 Vrms for A-law and 0.769 Vrms for -law, both for 600 1020 Hz sine wave; the input amplifier is set for unity gain. The digital input is ...

Page 36

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Distortion Parameter Description STD Transmit Signal to Total Distortion Ratio X A-law : Input level = 0 dBm0 Input level = -30 dBm0 Input level = -40 dBm0 Input level = -45 dBm0 -law : ...

Page 37

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Intrachannel Crosstalk Parameter Description XT Transmit to Receive Crosstalk X-R XT Receive to Transmit Crosstalk R-X Note: Crosstalk into the transmit channels (VIN) can be significantly affected by parasitic capacitive coupling VOUT outputs. PCB layouts ...

Page 38

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Microprocessor Interface Parameter Description CS setup time t12 CS pulse width t13 CS off time t14 t15 Input data setup time t16 Input data hold time t17 SLIC output latch valid t21 Output data turn ...

Page 39

IDT821068 OCTAL PROGRAMMABLE PCM CODEC PCM Interface Parameter Description t51 Data enable delay time t52 Data delay time from BCLK t53 Data float delay time t54 Frame sync setup time t55 Frame sync hold time TSX enable delay time t56 ...

Page 40

IDT821068 OCTAL PROGRAMMABLE PCM CODEC GCI Interface Parameter Description t71 FSC rise and fall time t72 FSC setup time t73 FSC hold time t74 FSC high pulse width t75 DU data delay time t77 DD data setup time t78 DD ...

Page 41

IDT821068 OCTAL PROGRAMMABLE PCM CODEC DCL 2.048 MHz FSC DU DD DCL 4.096 MHZ FSC DU DD Figure 19. Transmit and Receive Timing for GCI Interface (Detail Timing for Figure 18) t72 t72 t74 t74 t75 t73 t75 B6 B7 ...

Page 42

IDT821068 OCTAL PROGRAMMABLE PCM CODEC APPENDIX I: IDT821068 Coe-RAM Address Mapping b[2: Coe-RAM Word# Command 39 100 010 16 15 001 8 7 000 0 Generally, 6 bits of address are needed to locate ...

Page 43

IDT821068 OCTAL PROGRAMMABLE PCM CODEC Table 11 - Coe-RAM Address Allocation Word # ...

Page 44

IDT821068 OCTAL PROGRAMMABLE PCM CODEC ORDERING INFORMATION XXXXXX IDT Device Type XX X Process/ Package Temperature Range Blank PX 821068 44 INDUSTRIAL TEMPERATURE RANGE Industrial (-40 °C to +85 °C) Plastic Quad Flat Pack (PQFP, PX128) Octal Programmable PCM CODEC ...

Page 45

Data Sheet Document History 01/31/2002 pgs 12, 15, 33 02/19/2002 pg. 35 01/10/2003 pg. 44 12/08/2003 pgs. 28, 29, 32, 35, 38 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 *To search for sales office near ...

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